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PDF LMZ14201 Data sheet ( Hoja de datos )
| Número de pieza | LMZ14201 | |
| Descripción | 1A SIMPLE SWITCHER Power Module | |
| Fabricantes | National Semiconductor | |
| Logotipo |  |
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DataSheet.in
LMZ14201
April 12, 2010
1A SIMPLE SWITCHER® Power Module with 42V Maximum
Input Voltage
Easy to use 7 pin package
Performance Benefits
■ Operates at high ambient temperature with no thermal
derating
■ High efficiency reduces system heat generation
■ Low radiated emissions (EMI) complies with EN55022
class B standard
■ Low external component count
TO-PMOD 7 Pin Package
30114686
10.16 x 13.77 x 4.57 mm (0.4 x 0.542 x 0.18 in)
θJA = 20°C/W, θJC = 1.9°C/W
RoHS Compliant
System Performance
Efficiency VIN = 24V VOUT = 5.0V
Electrical Specifications
■ 6W maximum total output power
■ Up to 1A output current
■ Input voltage range 6V to 42V
■ Output voltage range 0.8V to 6V
■ Efficiency up to 90%
Key Features
■ Integrated shielded inductor
■ Simple PCB layout
■ Flexible startup sequencing using external soft-start and
precision enable
■ Protection against inrush currents and faults such as input
UVLO and output short circuit
■ – 40°C to 125°C junction temperature range
■ Single exposed pad and standard pinout for easy
mounting and manufacturing
■ Fast transient response for powering FPGAs and ASICs
■ Low output voltage ripple
■ Pin-to-pin compatible family:
LMZ14203/2/1 (42V max 3A, 2A, 1A)
LMZ12003/2/1 (20V max 3A, 2A, 1A)
■ Fully enabled for Webench® Power Designer
Applications
■ Point of load conversions from 12V and 24V input rail
■ Time critical projects
■ Space constrained / high thermal requirement applications
■ Negative output voltage applications (See AN-2027)
30114636
Thermal derating curve
VIN = 24V, VOUT = 5.0V,
30114637
Radiated Emissions (EN 55022 Class B)
from Evaluation Board
© 2010 National Semiconductor Corporation 301146
30114639
www.national.com
1 page  
DataSheet.in
Symbol
ΔVO/IOUT
η
Parameter
Load Regulation
Efficiency
Conditions
VIN = 24V
VIN = 24V VO = 3.3V IO = 1A
Min
(Note 3)
Typ Max
(Note 4) (Note 3)
1.5
92
Units
mV/A
%
Note 1: Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the
device is intended to be functional. For guaranteed specifications and test conditions, see the Electrical Characteristics.
Note 2: The human body model is a 100pF capacitor discharged through a 1.5 kΩ resistor into each pin. Test method is per JESD-22-114.
Note 3: Min and Max limits are 100% production tested at 25°C. Limits over the operating temperature range are guaranteed through correlation using Statistical
Quality Control (SQC) methods. Limits are used to calculate National’s Average Outgoing Quality Level (AOQL).
Note 4: Typical numbers are at 25°C and represent the most likely parametric norm.
Note 5: EN 55022:2006, +A1:2007, FCC Part 15 Subpart B: 2007. See AN-2024 and layout for information on device under test.
Note 6: Theta JA measured on a 1.705” x 3.0” four layer board, with one ounce copper, thirty five 12 mil thermal vias, no air flow, and 1W power dissipation.
Refer to PCB layout diagrams
Typical Performance Characteristics
Unless otherwise specified, the following conditions apply: VIN = 24V; Cin = 10uF X7R Ceramic; CO = 100uF X7R Ceramic; Tam-
bient = 25 C for efficiency curves and waveforms.
Efficiency 6V Input @ 25°C
Dissipation 6V Input @ 25°C
30114631
Efficiency 12V Input @ 25°C
30114632
Dissipation 12V Input @ 25°C
30114603
5
30114604
www.national.com
5 Page 
DataSheet.in
abled. This implements the feature of programmable under
voltage lockout. This is often used in battery powered systems
to prevent deep discharge of the system battery. It is also
useful in system designs for sequencing of output rails or to
prevent early turn-on of the supply as the main input voltage
rail rises at power-up. Applying the enable divider to the main
input rail is often done in the case of higher input voltage sys-
tems such as 24V AC/DC systems where a lower boundary
of operation should be established. In the case of sequencing
supplies, the divider is connected to a rail that becomes active
earlier in the power-up cycle than the LMZ14201 output rail.
The two resistors should be chosen based on the following
ratio:
RENT / RENB = (VIN UVLO/ 1.18V) – 1 (1)
The LMZ14201 demonstration and evaluation boards use
11.8kΩ for RENB and 68.1kΩ for RENT resulting in a rising UV-
LO of 8V. This divider presents 6.25V to the EN input when
the divider input is raised to 42V.
OUTPUT VOLTAGE SELECTION
Output voltage is determined by a divider of two resistors
connected between VO and ground. The midpoint of the di-
vider is connected to the FB input. The voltage at FB is
compared to a 0.8V internal reference. In normal operation
an on-time cycle is initiated when the voltage on the FB pin
falls below 0.8V. The main MOSFET on-time cycle causes the
output voltage to rise and the voltage at the FB to exceed
0.8V. As long as the voltage at FB is above 0.8V, on-time
cycles will not occur.
The regulated output voltage determined by the external di-
vider resistors RFBT and RFBB is:
VO = 0.8V * (1 + RFBT / RFBB) (2)
Rearranging terms; the ratio of the feedback resistors for a
desired output voltage is:
RFBT / RFBB = (VO / 0.8V) - 1 (3)
These resistors should be chosen from values in the range of
1.0 kohm to 10.0 kohm.
For VO = 0.8V the FB pin can be connected to the output di-
rectly so long as an output preload resistor remains that draws
more than 20uA. Converter operation requires this minimum
load to create a small inductor ripple current and maintain
proper regulation when no load is present.
A feed-forward capacitor is placed in parallel with RFBT to im-
prove load step transient response. Its value is usually deter-
mined experimentally by load stepping between DCM and
CCM conduction modes and adjusting for best transient re-
sponse and minimum output ripple.
A table of values for RFBT , RFBB , CFF and RON is included in
the applications schematic.
SOFT-START CAPACITOR SELECTION
Programmable soft-start permits the regulator to slowly ramp
to its steady state operating point after being enabled, thereby
reducing current inrush from the input supply and slowing the
output voltage rise-time to prevent overshoot.
Upon turn-on, after all UVLO conditions have been passed,
an internal 8uA current source begins charging the external
soft-start capacitor. The soft-start time duration to reach
steady state operation is given by the formula:
tSS = VREF * CSS / Iss = 0.8V * CSS / 8uA (4)
This equation can be rearranged as follows:
CSS = tSS * 8 μA / 0.8V (5)
Use of a 0.022μF results in 2.2 msec soft-start interval which
is recommended as a minimum value.
As the soft-start input exceeds 0.8V the output of the power
stage will be in regulation. The soft-start capacitor continues
charging until it reaches approximately 3.8V on the SS pin.
Voltage levels between 0.8V and 3.8V have no effect on other
circuit operation. Note that the following conditions will reset
the soft-start capacitor by discharging the SS input to ground
with an internal 200 μA current sink.
• The enable input being “pulled low”
• Thermal shutdown condition
• Over-current fault
• Internal Vcc UVLO (Approximately 4V input to VIN)
CO SELECTION
None of the required CO output capacitance is contained with-
in the module. At a minimum, the output capacitor must meet
the worst case minimum ripple current rating of 0.5 * ILR P-P,
as calculated in equation (19) below. Beyond that, additional
capacitance will reduce output ripple so long as the ESR is
low enough to permit it. A minimum value of 10 μF is generally
required. Experimentation will be required if attempting to op-
erate with a minimum value. Ceramic capacitors or other low
ESR types are recommended. See AN-2024 for more detail.
The following equation provides a good first pass approxima-
tion of CO for load transient requirements:
CO≥ISTEP*VFB*L*VIN/ (4*VO*(VIN—VO)*VOUT-TRAN)(6)
Solving:
CO≥ 1A*0.8V*10μH*24V / (4*3.3V*( 24V — 3.3V)*33mV)
≥ 21.3μF (7)
The LMZ14201 demonstration and evaluation boards are
populated with a 100 uF 6.3V X5R output capacitor. Locations
for other output capacitors are provided.
CIN SELECTION
The LMZ14201 module contains an internal 0.47 µF input ce-
ramic capacitor. Additional input capacitance is required ex-
ternal to the module to handle the input ripple current of the
application. This input capacitance should be located in very
close proximity to the module. Input capacitor selection is
generally directed to satisfy the input ripple current require-
ments rather than by capacitance value. Worst case input
ripple current rating is dictated by the equation:
I(CIN(RMS)) ≊ 1 /2 * IO * √ (D / 1-D) (8)
where D ≊ VO / VIN
(As a point of reference, the worst case ripple current will oc-
cur when the module is presented with full load current and
when VIN = 2 * VO).
Recommended minimum input capacitance is 10uF X7R ce-
ramic with a voltage rating at least 25% higher than the
maximum applied input voltage for the application. It is also
recommended that attention be paid to the voltage and tem-
perature deratings of the capacitor selected. It should be
noted that ripple current rating of ceramic capacitors may be
missing from the capacitor data sheet and you may have to
contact the capacitor manufacturer for this rating.
If the system design requires a certain minimum value of input
ripple voltage ΔVIN be maintained then the following equation
may be used.
CIN ≥ IO * D * (1–D) / fSW-CCM * ΔVIN(9)
If ΔVIN is 1% of VIN for a 24V input to 3.3V output application
this equals 240 mV and fSW = 400 kHz.
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| PDF Descargar | [ Datasheet LMZ14201.PDF ] | |
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