PDF ASM3P2854C Data sheet ( Hoja de datos )

Número de pieza	ASM3P2854C
Descripción	Custom Clock Generator
Fabricantes	ON Semiconductor
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No Preview Available ! www.DataSheet4U.com ASM3P2854C Custom Clock Generator for Fax System Features • Generates Custom Clocks for FAX system from an inexpensive 24MHz Crystal • 2x 66.66MHz low EMI (Spread Spectrum) clocks for ASIC1 (System / DDR SDRAM) • 1 x 48MHz for USB1.1 HOST • 2 x 33.33MHz low EMI (Spread Spectrum) clocks for System / DDR SDRAM of ASIC2 and ASIC3 • 1x 25MHz low EMI (Spread Spectrum) clock for LCD, Serial port, and buzzer of ASIC1 • 1x 12MHz for USB PHY (USB2.0) • 1x Programmable clock for printer engine control • One of the four programmable clock outputs selection through two Select Pins • Supply Voltage 3.3V ± 0.3V • Available in 16L TSSOP, Green package Product Description ASM3P2854C is a part of the two chip custom clock generator solution for NEC FAX system. Together with ASM3P2855D, ASM3P2854C realizes all the seventeen clocks required by the various components and subsystems of the FAX system. It uses an inexpensive 24MHz crystal as the input to generate two 66.66MHz low EMI (spread spectrum) clocks used by ASIC1 for system/ DDR SDRAM, two 33.33MHz low EMI (spread spectrum) clocks used by ASIC2 and ASIC3 for system/ DDR SDRAM, a 25MHz low EMI (Spread Spectrum) clock used by ASIC1 for LCD, Serial port, and buzzer, a 48MHz clock used by USB1.1 HOST, and a 12MHz clock used by USB PHY (USB2.0). One of the four Programmable clock (PCLK) frequencies of 24.00448MHz, 21.33732MHz, 21.19962MHz and 20.40464MHz used for Printer Engine control selectable through two Select pins S1 and S2. The accuracy of the synthesized programmable clocks is within ±18ppm. The custom clock generator works is with a Supply Voltage for 3.3V. The device is available in a 16L TSSOP Green package, over 0°C to +70°C temperature range. The output Clocks h ave an accuracy of ±50ppm. Block Diagram XIN / CLKIN XOUT Crystal (24 MHz) VDD PLL PLL PLL S1 S2 VDD_FOUT 2 66.6MHz SSCLK 2 33.3MHz SSCLK 25MHz SSCLK 48MHz 12MHz PCLK ©2010 SCILLC. All rights reserved. MARCH 2010 – Rev. 1 GND GND_FOUT Publication Order Number: ASM3P2854/D 1 page AC Electrical Characteristics Symbol Parameter XIN / CLKIN FOUT fd tLH2 tHL2 tJC tJP tD Input frequency At Pin 7 At Pin 8 Output frequency At Pins 9 and 10 At Pins 12 and 13 At Pin 151 At Pin 16 Frequency Deviation for Spread Spectrum Clocks Output rise time (measured from 20% to 80%) Output fall time (measured from 80% to 20%) Cycle to Cycle Jitter (For Modulated Clocks); unloaded outputs Period Jitter (For Non-Modulated Clocks) ); unloaded outputs Output duty cycle Notes: 1. See the PCLK Selection Table for PCLK Frequency. 2. tLH and tHL are measured into a capacitive load of 15pF. Cycle-Cycle Jitter Period Jitter ASM3P2854Cwww.DataSheet4U.com Min Typ Max Unit 24 48 12 33 MHz 66 PCLK 25 -0.5 % 1.0 nS 1.0 ±300 ±275 pS 45 50 55 % Jitter=J1=t2-t1 Jitter =J2=t3-t2 Rev. 1 \| Page 5 of 8 \| www.onsemi.com 5 Page

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