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PDF HT86R192 Data sheet ( Hoja de datos )
| Número de pieza | HT86R192 | |
| Descripción | Voice Synthesizer 8-Bit OTP MCU | |
| Fabricantes | Holtek Semiconductor | |
| Logotipo |  |
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Preliminary
www.DataSheet4U.com
HT86R192
Voice Synthesizer 8-Bit OTP MCU
Technical Document
· Tools Information
· FAQs
· Application Note
Features
· Operating voltage: 2.4V~5.2V
· System clock: 4MHz~8MHz
· Crystal or RC oscillator for system clock
· 23 I/O pins with 4 shared pins included
· 8K´16-bit program ROM
· 208´8-bit RAM
· 4096K-bit voice ROM size
· 192 sec voice length
· One external interrupt input
· Three 16-bit programmable timer counter and over-
flow interrupts
· 12-bit high quality D/A output by transistor or
HT82V733
Applications
· Intelligent educational leisure products
· Alert and warning systems
· Built-in voice ROM in various capacity
· One optional 32768Hz crystal oscillator for RTC time
base (8-bit counter with 3-bit prescaler)
· Watchdog Timer
· 8-level subroutine nesting
· HALT function and wake-up feature reduce power
consumption
· Up to 1ms (0.5ms) instruction cycle with 4MHz (8MHz)
system clock
· Support 16-bit table read instruction (TBLP, TBHP)
· 63 powerful and efficient instructions
· 28-pin SOP, 44/100-pin QFP package
· High end leisure product controllers
· Sound effect generators
General Description
The HT86R192 series are 8-bit high performance
microcontroller with voice synthesizer and tone genera-
tor. The HT86R192 is designed for applications on mul-
tiple I/Os with sound effects, such as voice and melody.
It can provide various sampling rates and beats, tone
levels, tempos for speech synthesizer and melody gen-
erator. It has a single built-in high quality, D/A output.
There is an external interrupt which can be triggered
with falling edge pulse or falling/rising edge pulse.
The HT86R192 is excellent for versatile voice and
sound effect product applications. The efficient MCU in-
structions allow users to program the powerful custom
applications. The system frequency of HT86R192 can
be up to 8MHz under 2.4V and include a HALT function
to reduce power consumption.
Rev. 0.00
1 October 23, 2006
1 page  
Preliminary
www.DataSheet4U.com
HT86R192
Pad Coordinates
Pad No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
X
-1990.600
-1990.600
-1990.600
-1990.600
-1990.600
-1990.600
-1990.600
-1990.600
-1990.600
-1990.600
-1990.600
-1784.650
-1679.350
-1576.350
-1481.350
-1378.350
-1283.350
-1180.350
-1085.350
Y
-1465.900
-1568.900
-1663.900
-1766.900
-1861.900
-1964.900
-2059.900
-2162.900
-2257.900
-2360.900
-2455.900
-2453.400
-2453.400
-2453.400
-2453.400
-2453.400
-2453.400
-2453.400
-2453.400
Pad No.
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
X
-982.350
-887.350
-784.350
-689.350
-586.350
-454.800
-364.800
-274.800
-23.900
81.110
186.100
291.100
397.100
508.900
1984.750
1990.900
1990.850
1990.850
Unit: mm
Y
-2453.400
-2453.400
-2453.400
-2453.400
-2453.400
-2467.000
-2467.000
-2467.000
-2414.250
-2399.950
-2390.750
-2384.950
-2384.000
-2384.000
-2404.700
-2232.500
-2119.776
-2016.174
Pad Description
Pad Name
PA0~PA7
PB0~PB7
PC0~PC5
PC6/XIN
XOUT
VSS
VDD
VDDA
VSSA
RES
INT
OSC1
OSC2
AUD
NC
TEST
I/O OTP Option
Description
Wake-up,
Bidirectional 8-bit I/O port. Each bit can be configured as a wake-up input
I/O Pull-high by OTP option. Software instructions determine the CMOS output or
or None
Schmitt trigger input with or without pull-high resistor (OTP option).
I/O
Pull-high
or None
Bidirectional 8-bit I/O port. Software instructions determine the CMOS
output or Schmitt trigger input (pull-high resistor depending on OTP op-
tion).
I/O
Pull-high
or None
Bidirectional 7-bit I/O port. Software instructions determine the CMOS
output or Schmitt trigger input (pull-high resistor depending on OTP op-
tion). XIN is pin-shared with PC6
¾
32kHz RTC
Connected an external 32kHz crystal to XIN and XOUT.
¾ ¾ Negative power supply, ground
¾ ¾ Positive power supply
¾ ¾ DAC power supply
¾ ¾ DAC negative power supply, ground
I ¾ Schmitt trigger reset input, active low
External interrupt Schmitt trigger input without pull-high resistor. Choice
Falling Edge Trigger falling edge trigger or falling/rising edge trigger by OTP option. Falling
I or Falling/Rising Edge edge triggered active on a high to low transition. Rising edge triggered
Trigger
active on a low to high transition. Input voltage is the same as operating
voltage.
OSC1 and OSC2 are connected to an RC network or a crystal (by OTP
option) for the internal system clock. In the case of RC operation, OSC2
¾ RC or Crystal is the output terminal for 1/4 system clock.
The system clock may come from the crystal, the two pins cannot be
floating.
O ¾ Audio output for driving a external transistor or for driving HT82V733
¾ ¾ No connection
¾ ¾ No connection (open)
Rev. 0.00
5 October 23, 2006
5 Page 
Preliminary
www.DataSheet4U.com
HT86R192
Stack Register - Stack
The stack register is a special part of the memory used
to save the contents of the Program Counter. This stack
is organized into eight levels. It is neither part of the data
nor part of the program space, and cannot be read or
written to. Its activated level is indexed by a stack
pointer (SP) and cannot be read or written to. At a sub-
routine call or interrupt acknowledgment, the contents of
the Program Counter are pushed onto the stack.
The Program Counter is restored to its previous value
from the stack at the end of subroutine or interrupt rou-
tine, which is signaled by return instruction (RET or
RETI). After a chip resets, SP will point to the top of the
stack.
The interrupt request flag will be recorded but the ac-
knowledgment will be inhibited when the stack is full and
a non-masked interrupt takes place. After the stack
pointer is decremented (by RET or RETI), the interrupt
request will be serviced. This feature prevents stack
overflow and allows programmers to use the structure
more easily. In a similar case, if the stack is full and a
²CALL² is subsequently executed, stack overflow oc-
curs and the first entry is lost.
Data Memory - RAM
The data memory is designed with 208´8 bits. The data
memory is further divided into two functional groups,
namely, special function registers (00H~2AH) and gen-
eral purpose user data memory (30H~FFH). Although
most of them can be read or be written to, some are read
only.
The special function registers include an Indirect ad-
dressing register (R0:00H), Memory pointer register
(MP0:01H), Accumulator (ACC:05H), Program Counter
lower-order byte register (PCL:06H), Table pointer
(TBLP:07H), Table higher-order byte register
(TBLH:08H), Status register (STATUS:0AH), Interrupt
control register 0 (INTC:0BH), Timer/Event Counter 0
(TMR0H:0CH,TMR0L:0DH), Timer/Event Counter 0
control register (TMR0C:0EH), Timer/Event Counter 1
(TMR1H:0FH, TMR1L:10H), Timer/Event Counter 1
control register (TMR1C:11H), I/O registers
(PA:12H,PB:14H,PC:16H), I/O control registers
(PAC:13H,PBC:15H,PCC:17H), Voice ROM address
latch0[19:0] (LATCH0H:18H, LATCH0M:19H,
LATCH0L:1AH), Voice ROM address latch1[19:0]
(LATCH1H:1BH, LATCH1M:1CH, LATCH1L:1DH), In-
terrupt control register 1 (INTCH:1EH), Table pointer
higher-order byte register (TBHP:1FH), Timer Counter 2
(TMR2H:20H, TMR2L:21H), Timer Counter 2 control
register (TMR2C:22H), Timer Counter 3 (TMR3L:24H),
Timer Counter 3 control register (TMR3C:25H), Voice
control register (VOICEC:26H), DAC output (DAH:27H,
DAL:28H), Volume control register (VOL:29H), Voice
ROM latch data register (LATCHD:2AH).
The general purpose data memory, addressed from
30H~FFH, is used for data and control information un-
der instruction commands.
The areas in the RAM can directly handle the arithmetic,
logic, increment, decrement, and rotate operations. Ex-
cept some dedicated bits, each bit in the RAM can be
set and reset by ²SET [m].i² and ²CLR [m].i². They are
also indirectly accessible through the memory pointer
register 0 (MP0:01H) or the Memory Pointer register 1
(MP1:03H).
Address RAM Mapping
00H R0
01H MP0
02H R1
03H MP1
04H Unused
05H ACC
06H PCL
07H TBLP
08H TBLH
09H WDTS
0AH STATUS
0BH INTC
0CH TMR0H
0DH TMR0L
0EH TMR0C
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R/W
R/W
R/W
R/W
R/W
R/W
Description
Indirect addressing register 0
Memory pointer 0
Indirect addressing register 1
Memory pointer 1
Accumulator
Program Counter lower-order byte address
Table pointer lower-order byte address
Table higher-order byte content register
Watchdog Timer option setting register
Status register
Interrupt control register 0
Timer/Event Counter 0 higher-byte register
Timer/Event Counter 0 lower-byte register
Timer/Event Counter 0 control register
Rev. 0.00
11 October 23, 2006
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet HT86R192.PDF ] | |
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