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PDF CS1600 Data sheet ( Hoja de datos )

Número de pieza CS1600
Descripción Low-cost PFC Controller
Fabricantes Cirrus Logic 
Logotipo Cirrus Logic Logotipo



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CS1600
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Low-cost PFC Controller for Electronic Ballasts
Features & Description
Lowest PFC System Cost for Electronic Ballasts
Variable Frequency Discontinuous Conduction Mode
Improved Efficiency Due to Variable Switching Frequency
EMI Signature Reduction from Digital Noise Shaping
Integrated Feedback Compensation
Overvoltage Protection with Hysteresis
Overpower Protection with Shutdown
UVLO with Wide Hysteresis
Thermal Shutdown with Hysteresis
Description
CS1600 is a high-performance Variable Frequency Discontinu-
ous Conduction Mode (VF - DCM), active Power Factor
Correction (PFC) controller, optimized to deliver the lowest PFC
system cost for electronic ballast applications.
A variable ON time / variable frequency algorithm is used to
achieve near unity power factor. This algorithm spreads the EMI
frequency spectrum, which reduces the conducted EMI filtering
requirements. The feedback loop is closed through an integrated
compensation network within the IC, eliminating the need for
additional external components. Protection features such as
overvoltage, overcurrent, overpower, open- and short-circuit pro-
tection, overtemperature, and brownout help protect the device
during abnormal transient conditions.
Pin Assignments
NC 1
8 NC
STBY 2
7 VDD
IAC 3
6 GD
FB 4
5 GND
8-lead SOIC
D5
L1
BR1
AC
Mains
BR1
R1a RAC
BR1
R1b CS1600
1
R1c NC
C1
3
IAC
2
STBY
4
FB
+12V
7
VDD
6
GD
BR1
C2 8
NC
5
GND
R3
D6
R2a
RFB
R2b
R2c
Q1
C3a Clink
C3b
Advance Product Information
This document contains information for a product under development.
Cirrus Logic reserves the right to modify this product without notice.
Cirrus Logic, Inc.
http://www.cirrus.com
Copyright Cirrus Logic, Inc. 2010
(All Rights Reserved)
MAY ‘10
DS904A5

1 page




CS1600 pdf
CS1600
3. TYPICAL ELECTRICAL PERFORMANCE
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3.5
3 CL = 1 nF
fSW = 70 kHz
2.5 TA = 25 °C
2
1.5
Rising
1
Falling
0.5
0
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
VDD (V)
Figure 1. UVLO Characteristics
13
12
11
10
9
Startup
8
UVLO
7
-50 0 50 100
TEMP (oC)
Figure 2. Start-up & UVLO vs. Temperature
150
2 19
IDD = 20 mA
1.5 18.5
1 18
0.5 17.5
0
-50 0
50 100
TEMP (oC)
Figure 3. UVLO Hysteresis vs. Temperature
17
150 -50
0 50 100
TEMP (oC)
150
Figure 4. VDD Zener Voltage vs. Temperature
DS904A5
5

5 Page





CS1600 arduino
CS1600
5. FLUORESCENT BALLAST APPLICATION EXAMPLE
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The following section gives an example for a front-end PFC stage design for an electronic ballast application. The equations that
follow may be used as guidelines for any other requirements using the CS1600.
D5
L1 D6
BR1
AC
Mains
BR1
R1a RAC
BR1
R1b CS1600
1
C1 R1c NC
3
IAC
2
STBY
4
FB
+12V
7
VDD
6
GD
BR1
C2 8
NC
5
GND
R3
R2a
RFB
R2b
R2c
Q1
C3a Clink
C3b
Figure 17. CS1600 Basic Application Circuit
5.1 Component Selection Guidelines
The following design example is for a wide-input-voltage
fluorescent ballast application using 2 T5 lamps in series for a
total nominal power of 108W.The target specifications for the
PFC portion of the design, assuming a 94% efficient second
stage, are as follows:
Vin(min)
Vin(max)
Vlink
Po
η
108 VAC
305 VAC
460 V
115 W
95%
5.1.1 IAC and IFB Sense Resistors
The rectified line voltage, VAC, and the output voltage of the
PFC boost converter, Vlink, are scaled as currents by using
sense resistors, whose values are estimated based on the
equations below:
RFB
=
V-----l-i--n--k----–-----V----d---d-
Iref
RFB
=
---4----6---0-----–----1----2----
130 × 106
[Eq.4]
RFB = 3.45MΩ
RAC = RFB
RAC = 3.45MΩ
[Eq.5]
where
RFB = Feedback resistor used to reflect the PFC output
voltage
RAC = Feedforward resistor used to reflect the rectified line
voltage
Vlink= PFC Output Voltage
VDD = IC Supply Voltage
Iref = Target reference current used for feedback
1% or lower tolerance resistors are recommended to
maximize the tightly toleranced system behavior provided by
the unique digital controller in the CS1600. Resistors may be
separated into two or more series elements if voltage
breakdown and/or regulatory compliance is of concern.
5.1.2 PFC Input Filter Capacitor
For a typical 115 W PFC output stage required to power up a
108 W fluorescent ballast, an input filter capacitance of
0.33 μF is recommended. Capacitor tolerances and the value
of the EMI filter capacitor need to be considered when
selecting the value of the capacitor to be used in this
application.
DS904A5
11

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