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PDF NTMFS4122N Data sheet ( Hoja de datos )
| Número de pieza | NTMFS4122N | |
| Descripción | Power MOSFET ( Transistor ) | |
| Fabricantes | ON Semiconductor | |
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NTMFS4122N
Power MOSFET
30 V, 23 A, Single N−Channel,
SO−8 Flat Lead
Features
• Low RDS(on)
• Low Inductance SO−8 Package
• This is a Pb−Free Device
Applications
• Notebooks, Graphics Cards
• DC−DC Converters
• Synchronous Rectification
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Parameter
Symbol Value Unit
Drain−to−Source Voltage
Gate−to−Source Voltage
Continuous Drain Current
(Note 1 )
Steady
State
t v10 s
TA = 25°C
TA = 85°C
TA = 25°C
Power Dissipation (Note 1)
Steady
State
t v10 s
TA = 25°C
Continuous Drain Current
(Note 2)
Power Dissipation (Note 2)
Steady
State
TA = 25°C
TA = 85°C
TA = 25°C
Pulsed Drain Current
tp = 10 ms
Operating Junction and Storage Temperature
VDSS
VGS
ID
PD
ID
PD
IDM
TJ, Tstg
30
$20
14
10
23
2.2
5.8
9.1
6.5
0.9
68
−55 to
150
V
V
A
W
A
W
A
°C
Source Current (Body Diode)
Single Pulse Drain−to−Source Avalanche Energy
(VDD = 75 V, VGS = 10 V, IPK = 21 A, L = 1 mH,
RG = 25 W)
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
IS
EAS
TL
7.0 A
220 mJ
260 °C
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter
Symbol Value Unit
Junction−to−Ambient − Steady State (Note 1)
RqJA 56.3 °C/W
Junction−to−Ambient − t v10 s (Note 1)
RqJA
21.5
Junction−to−Ambient − Steady State (Note 2)
RqJA 141.6
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. Surface mounted on FR4 board using 1 in sq pad size
(Cu area = 1.127 in sq [1 oz] including traces).
2. Surface mounted on FR4 board using the minimum recommended pad size
(Cu area = 0.0264 in sq).
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V(BR)DSS
30 V
RDS(on) TYP
4.6 mW @ 10 V
6.3 mW @ 4.5 V
ID MAX
(Note 1)
23 A
D
G
S
MARKING
DIAGRAM
1
SO−8 FLAT LEAD
CASE 488AA
STYLE 1
D
S
S 4122N
S AYWWG
GG
D
D
D
4122N = Specific Device Code
A = Assembly Location
Y = Year
WW = Work Week
G = Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
Device
Package
Shipping†
NTMFS4122NT1G SO−8 FL 1500 Tape & Reel
(Pb−Free)
NTMFS4122NT3G SO−8 FL 5000 Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
*For additional information on our Pb−Free strategy
and soldering details, please download the
ON Semiconductor Soldering and Mounting
Techniques Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2005
September, 2005 − Rev. 2
1
Publication Order Number:
NTMFS4122N/D
1 page  
NTMFS4122N
PACKAGE DIMENSIONS
SO−8 FLAT LEAD
CASE 488AA−01
ISSUE A
D
2
D1
6
2X
0.20 C
A
B 2X
5 0.20 C
E1
2E
1 2 34
TOP VIEW
c
0.10 C
0.10 C
SIDE VIEW
A
DETAIL A
4X
q
A1
3X
e
DETAIL A
C
SEATING
PLANE
6X b
0.10 C A B
0.05 c L
1
e/2
4
K
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NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION D1 AND E1 DO NOT INCLUDE
MOLD FLASH PROTRUSIONS OR GATE
BURRS.
MILLIMETERS
DIM MIN NOM MAX
A 0.90 0.99 1.20
A1 0.00 −−− 0.05
b 0.33 0.41 0.51
c 0.23 0.28 0.33
D 5.15 BSC
D1 4.50 4.90 5.10
D2 3.50 −−− 4.22
E 6.15 BSC
E1 5.50 5.80 6.10
E2 3.45 −−− 4.30
e 1.27 BSC
G 0.51 0.61 0.71
K 0.51 −−− −−−
L 0.51 0.61 0.71
L1 0.05 0.17 0.20
q 0 _ −−− 12 _
STYLE 1:
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
5. DRAIN
6. DRAIN
E2
L1
65
G D2
BOTTOM VIEW
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