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PDF 74LVC1G99 Data sheet ( Hoja de datos )
| Número de pieza | 74LVC1G99 | |
| Descripción | Ultra-configurable multiple function gate | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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74LVC1G99
www.DataSheet4U.com
Ultra-configurable multiple function gate; 3-state
Rev. 04 — 16 April 2010
Product data sheet
1. General description
The 74LVC1G99 provides a low voltage, ultra-configurable, multiple function gate with
3-state output. The device can be configured as one of several logic functions including,
AND, OR, NAND, NOR, XOR, XNOR, inverter, buffer and MUX. No external components
are required to configure the device as all inputs can be connected directly to VCC or
GND. The 3-state output is controlled by the output enable input (OE). A HIGH level at OE
causes the output (Y) to assume a high-impedance OFF-state. When OE is LOW, the
output state is determined by the signals applied to the Schmitt-trigger inputs (A, B, C and
D).
Due to the use of Schmitt-trigger inputs the device is tolerant of slowly changing input
signals, transforming them into sharply defined, jitter free output signals. By eliminating
leakage current paths to VCC and GND, the inputs and disabled output are also
over-voltage tolerant, making the device suitable for mixed-voltage applications.
This device is fully specified for partial power-down applications using IOFF.
The IOFF circuitry disables the output, preventing the damaging backflow current through
the device when it is powered down.
The 74LVC1G99 is fully specified over the supply range from 1.65 V to 5.5 V.
2. Features and benefits
Wide supply voltage range from 1.65 V to 5.5 V
5 V tolerant inputs for interfacing with 5 V logic
High noise immunity
Complies with JEDEC standard:
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8-B/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
±24 mA output drive (VCC = 3.0 V)
CMOS low power consumption
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
Inputs accept voltages up to 5 V
Multiple package options
Specified from −40 °C to +85 °C and −40 °C to +125 °C.
1 page  
NXP Semiconductors
74LVC1G99
www.DataSheet4U.com
Ultra-configurable multiple function gate; 3-state
7.1 Logic configurations
Table 5. Function selection table
Primary function
3-state buffer
3-state inverter
3-state 2-input multiplexer
3-state 2-input multiplexer with inverting output
3-state 2-input AND
3-state 2-input AND with one inverting input
3-state 2-input AND with two inverting inputs
3-state 2-input NAND
3-state 2-input NAND with one inverting input
3-state 2-input NAND with two inverting inputs
3-state 2-input XOR
3-state 2-input XNOR
Complementary function
3-state 2-input NOR with two inverting inputs
3-state 2-input NOR with one inverting input
3-state 2-input NOR
3-state 2-input OR with two inverting inputs
3-state 2-input OR with one inverting input
3-state 2-input OR
3-state 2-input XOR with one inverting input
7.2 3-state buffer functions available
Table 6. Function table[1]
See Figure 6.
Function
Input
OE
3-state buffer
L
L
L
L
L
L
L
A
input
H or L
L
H
H
H or L
L
B
H or L
input
H
L
H or L
L
L
[1] H = HIGH voltage level;
L = LOW voltage level.
C
L
H
input
input
L
H
H or L
D
L
L
L
H
input
input
input
Fig 6. 3-state buffer function
OE
input
Y
001aah326
74LVC1G99_4
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 04 — 16 April 2010
© NXP B.V. 2010. All rights reserved.
5 of 29
5 Page 
NXP Semiconductors
74LVC1G99
www.DataSheet4U.com
Ultra-configurable multiple function gate; 3-state
7.7 3-state XOR/XNOR functions available
Table 17. Function table[1]
See Figure 17.
Function
Input
OE
3-state XOR
L
L
L
L
L
L
A
input 1
input 2
H or L
H or L
L
L
B
H or L
H or L
input 1
input 2
H
H
C
L
L
H
H
input 1
input 2
[1] H = HIGH voltage level;
L = LOW voltage level.
D
input 2
input 1
input 2
input 1
input 2
input 1
Fig 17. 3-state XOR function
Table 18. Function table[1]
See Figure 18.
Function
Input
OE
3-state XOR
L
[1] H = HIGH voltage level;
L = LOW voltage level.
OE
input 1
input 2
A
H
Y
001aah337
BC
L input 1
D
input 2
Fig 18. 3-state XOR function
OE
input 1
input 2
Y
001aah338
74LVC1G99_4
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 04 — 16 April 2010
© NXP B.V. 2010. All rights reserved.
11 of 29
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| Páginas | Total 29 Páginas | |
| PDF Descargar | [ Datasheet 74LVC1G99.PDF ] | |
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