|
|
PDF LTC2497 Data sheet ( Hoja de datos )
| Número de pieza | LTC2497 | |
| Descripción | 16-Bit 8-/16-Channel ADC | |
| Fabricantes | Linear Technology | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de LTC2497 (archivo pdf) en la parte inferior de esta página. Total 28 Páginas | ||
|
No Preview Available !
LTC2497
16-Bit 8-/16-Channel
ΔΣ ADC with Easy Drive Input Current
Cancellation and I2C Interface
FEATURES
■ Up to Eight Differential or 16 Single-Ended Inputs
■ Easy DriveTM Technology Enables Rail-to-Rail
Inputs with Zero Differential Input Current
■ Directly Digitizes High Impedance Sensors with
Full Accuracy
www■.Da2t-aWShireeetI42UC.cIonmterface with 27 Addresses Plus One
Global Address for Synchronization
■ 600nV RMS Noise (0.02LSB Transition Noise)
■ GND to VCC Input/Reference Common Mode Range
■ Simultaneous 50Hz/60Hz Rejection
■ 2ppm INL, No Missing Codes
■ 1ppm Offset and 15ppm Full-Scale Error
■ No Latency: Digital Filter Settles in a Single Cycle,
Even After a New Channel Is Selected
■ Single Supply, 2.7V to 5.5V Operation (0.8mW)
■ Internal Oscillator
■ Tiny 5mm × 7mm QFN Package
APPLICATIONS
■ Direct Sensor Digitizer
■ Direct Temperature Measurement
■ Instrumentation
■ Industrial Process Control
DESCRIPTION
The LTC®2497 is a 16-channel (eight differential), 16-bit,
No Latency ΔΣTM ADC with Easy Drive technology and a
2-wire, I2C interface. The patented sampling scheme elimi-
nates dynamic input current errors and the shortcomings
of on-chip buffering through automatic cancellation of
differential input current. This allows large external source
impedances and rail-to-rail input signals to be directly
digitized while maintaining exceptional DC accuracy.
The LTC2497 includes an integrated oscillator. This device
can be configured to measure an external signal from com-
binations of 16 analog input channels operating in single-
ended or differential modes. It automatically rejects line
frequencies of 50Hz and 60Hz simultaneously.
The LTC2497 allows a wide, common mode input range
(0V to VCC), independent of the reference voltage. Any
combination of single-ended or differential inputs can be
selected and the first conversion, after a new channel is
selected, is valid. Access to the multiplexer output enables
optional external amplifiers to be shared between all
analog inputs and auto calibration continuously removes
their associated offset and drift.
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
No Latency ∆Σ and Easy Drive are trademarks of Linear Technology Corporation. All other
trademarks are the property of their respective owners.
TYPICAL APPLICATION
Easy Drive Data Acquisition System
2.7V TO 5.5V
CH0
CH1
•
•
•
CH7
CH8
•
•
•
CH15
COM
16-CHANNEL
MUX
MUXOUT/
ADCIN
VCC
REF+
IN+
16-BIT ∆Σ ADC
WITH EASY DRIVE
IN–
REF –
SDA
SCL
MUXOUT/
ADCIN
OSC
FO
2497 TA01
10µF
0.1µF
1.7k
2-WIRE
I2C INTERFACE
+FS Error vs RSOURCE at IN+ and IN–
80
VCC = 5V
60
40
VVVRIINNE+–F
=
=
=
5V
3.75V
1.25V
FO = GND
20 TA = 25°C
0
CIN = 1µF
–20
–40
–60
–80
1
10 100 1k 10k 100k
RSOURCE (Ω)
2497 TA01b
2497f
1
1 page  
LTC2497
DIGITAL INPUTS AND DIGITAL OUTPUTS The ● denotes the specifications which apply over the
full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3)
SYMBOL PARAMETER
CONDITIONS
MIN TYP MAX UNITS
fEOSC
tHEO
tLEO
tCONV
External Oscillator Frequency Range
External Oscillator High Period
External Oscillator Low Period
Conversion Time
(Note 16)
Internal Oscillator
External Oscillator (Note 10)
● 10
4000
● 0.125
100
● 0.125
100
● 144.1
146.9
149.9
41036/fEOSC (in kHz)
kHz
µs
µs
ms
ms
I2C TIMING CHARACTERISTICS The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. (Note 3, 15)
wwwS.DYMatBaOSLheet4PUA.RcAoMmETER
CONDITIONS
MIN TYP MAX
UNITS
fSCL
tHD(SDA)
tLOW
tHIGH
tSU(STA)
tHD(DAT)
tSU(DAT)
tr
tf
tSU(STO)
SCL Clock Frequency
Hold Time (Repeated) Start Condition
Low Period of the SCL Pin
High Period of the SCL Pin
Set-Up Time for a Repeated Start Condition
Data Hold Time
Data Set-Up Time
Rise Time for SDA Signals
Fall Time for SDA Signals
Set-Up Time for Stop Condition
(Note 14)
(Note 14)
●0
● 0.6
● 1.3
● 0.6
● 0.6
●0
● 100
● 20 + 0.1CB
● 20 + 0.1CB
● 0.6
400 kHz
µs
µs
µs
µs
0.9 µs
ns
300 ns
300 ns
µs
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All voltage values are with respect to GND.
Note 3: VCC = 2.7V to 5.5V unless otherwise specified.
VREFCM = VREF/2, FS = 0.5VREF
VIN = IN+ – IN–, VIN(CM) = (IN+ – IN–)/2,
where IN+ and IN– are the selected input channels.
Note 4: Use internal conversion clock or external conversion clock source
with fEOSC = 307.2kHz unless otherwise specified.
Note 5: Guaranteed by design, not subject to test.
Note 6: Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve.
The deviation is measured from the center of the quantization band.
Note 7: fEOSC = 256kHz ±2% (external oscillator).
Note 8: fEOSC = 307.2kHz ±2% (external oscillator).
Note 9: Simultaneous 50Hz/60Hz (internal oscillator) or fEOSC = 280kHz
±2% (external oscillator).
Note 10: The external oscillator is connected to the FO pin. The external
oscillator frequency, fEOSC, is expressed in kHz.
Note 11: The converter uses its internal oscillator.
Note 12: The output noise includes the contribution of the internal
calibration operations.
Note 13: Guaranteed by design and test correlation.
Note 14: CB = capacitance of one bus line in pF (10pF ≤ CB ≤ 400pF).
Note 15: All values refer to VIH(MIN) and VIL(MAX) levels.
Note 16: Refer to Applications Information section for performance versus
data rate graphs.
2497f
5
5 Page 
LTC2497
APPLICATIONS INFORMATION
CONVERTER OPERATION
Converter Operation Cycle
The LTC2497 is a multichannel, low power, delta-sigma
analog-to-digital converter with a 2-wire, I2C interface.
Its operation is made up of four states (see Figure 1).
The converter operating cycle begins with the conver-
sion, followed by the sleep state and ends with the data
input/output cycle .
www.DataSheet4U.com
POWER-ON RESET
DEFAULT INPUT CHANNEL:
IN+ = CH0, IN– = CH1
CONVERSION
SLEEP
NO
ACKNOWLEDGE
YES
DATA OUTPUT/INPUT
NO STOP
OR READ
24 BITS
YES
2497 F01
Figure 1. State Transition Table
Initially, at power-up, the LTC2497 performs a conver-
sion. Once the conversion is complete, the device enters
the sleep state. In the sleep state, power consumption is
reduced by two orders of magnitude. The part remains in
the sleep state as long it is not addressed for a read/write
operation. The conversion result is held indefinitely in a
static shift register while the part is in the sleep state.
The device will not acknowledge an external request dur-
ing the conversion state. After a conversion is finished,
the device is ready to accept a read/write request. Once
the LTC2497 is addressed for a read operation, the device
begins outputting the conversion result under the control
of the serial clock (SCL). There is no latency in the conver-
sion result. The data output is 24 bits long and contains a
16-bit plus sign conversion result. Data is updated on the
falling edges of SCL allowing the user to reliably latch data
on the rising edge of SCL. A new conversion is initiated
by a stop condition following a valid write operation or an
incomplete read operation. The conversion automatically
begins at the conclusion of a complete read cycle (all 24
bits read out of the device).
Ease of Use
The LTC2497 data output has no latency, filter settling
delay, or redundant data associated with the conversion
cycle. There is a one-to-one correspondence between the
conversion and the output data. Therefore, multiplexing
multiple analog inputs is straightforward. Each conversion,
immediately following a newly selected input is valid and
accurate to the full specifications of the device.
The LTC2497 automatically performs offset and full-scale
calibration every conversion cycle independent of the
input channel selected. This calibration is transparent
to the user and has no effect on the operation cycle de-
scribed above. The advantage of continuous calibration
is extreme stability of offset and full-scale readings with
respect to time, supply voltage variation, input channel,
and temperature drift.
Easy Drive Input Current Cancellation
The LTC2497 combines a high precision, delta-sigma ADC
with an automatic, differential, input current cancellation
front end. A proprietary front end passive sampling network
transparently removes the differential input current. This
enables external RC networks and high impedance sen-
sors to directly interface to the LTC2497 without external
amplifiers. The remaining common mode input current
is eliminated by either balancing the differential input im-
pedances or setting the common mode input equal to the
2497f
11
11 Page | ||
| Páginas | Total 28 Páginas | |
| PDF Descargar | [ Datasheet LTC2497.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| LTC2492 | 24-Bit 2-/4-Channel ADC | Linear Technology |
| LTC2493 | 24-Bit 2-/4-Channel ADC | Linear Technology |
| LTC2494 | 16-Bit 8-/16-Channel ADC | Linear Technology |
| LTC2495 | No Latency ADC |  Linear Integrated Systems |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |