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PDF HMD4M72D18EG Data sheet ( Hoja de datos )
| Número de pieza | HMD4M72D18EG | |
| Descripción | 32Mbyte(4Mx72) EDO Mode | |
| Fabricantes | Hanbit Electronics | |
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HANBit
HMD4M72D18EG
32Mbyte(4Mx72) EDO Mode 4K Ref. 5V, DIMM 168 pin
Part No. HMD4M72D18EG-6
GENERAL DESCRIPTION
The HMD4M72D18EG is a 4Mx72bits Dynamic RAM high density memory module. The HMD4M72D18EG consists of
eighteen CMOS 4Mx4bits DRAMs in SOJ/TSOPІІ 400mil packages mounted on a 168-pin glass-epoxy substrate. A 0.1 or
0.22uF decoupling capacitor is mounted on the printed circuit board for each DRAM. The HMD4M72D18EG is a Dual In-
line Memory Module and is intended for mounting into 168 pin edge connector sockets
www.DataShFeEetA4UT.cUoRmES
PERFORMANCE RANGE
w Part Identification
HMD4M72D18EG --- 4KCycles/64ms Ref, Gold Plate Lead
w High-density 32MByte design
w New JEDEC standard proposal without buffer
w CAS-before-RAS Refresh capability
w RAS-only and Hidden refresh capability
w Single +5± 0.5V power supply
w EDO mode operation.
w LVTTL compatible inputs and outputs
w FR4-PCB design
w Access times : 50, 60ns
SPEED
-5
-6
w Timing
50ns access
60ns access
w Packages
168-pin DIMM
tRAC
50ns
60ns
tCAC
15ns
17ns
-5
-6
D
tRC
84ns
104ns
tHPC
20ns
25ns
PIN NAMES
Pin Name
Function
Pin Name
Function
Pin Name
Function
A0-A11 Address Input (4k ref) /RAS0, /RAS2 Row Address Strobe
Vss Ground
A0-A12 Address Input (8k ref)
/CAS0 -
Column Address Strobe
NC
No Connection
/CAS7
/W0,/W2 Read/Write Enable
SCL
Serial Clock
Vcc Power (+5V)
/OE0,/OE2 Output Enable
DU Don't use
SDA
Serial Address /Data
SA0 – SA2 Address in EEPROM
CB0 - CB7 Check Bit
I/O
DQ0-DQ63 Data In/Out
URL:www.hbe.co.kr
REV.1.0 (August.2002)
-1-
HANBit Electronics Co.,Ltd.
1 page  
HANBit
HMD4M72D18EG
ICC5 : Standby Current (/RAS=/CAS=Vcc-0.2V )
ICC6 : /CAS-Before-/RAS Refresh Current * (/RAS and /CAS cycling @tRC=min )
IIL : Input Leakage Current (Any input 0V ≤ VIN ≤ 4.5V, all other pins not under test = 0V)
IOL : Output Leakage Current (Data out is disabled, 0V ≤ VOUT ≤ 3.3V
VOH : Output High Voltage Level (IOH= -2mA )
VOL : Output Low Voltage Level (IOL = 2mA )
* NOTE: ICC1, ICC3, ICC4 and ICC6 are dependent on output loading and cycle rates. Specified values are obtained with the
output open. ICC is specified as an average current. In ICC1 and ICC3, address cad be changed maximum once
while /RAS=VIL. In ICC4, address can be changed maximum once within one page mode cycle.
CAPACITANCE
o
( TA=25 C, Vcc = 5V, f = 1Mz )
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DESCRIPTION
Input Capacitance (A0-A11)
Input Capacitance (/W0,/W1,/OE0,/OE2)
Input Capacitance (/RAS0,/RAS2)
Input Capacitance (/CAS0-/CAS7)
Input/Output Capacitance (DQ0-63)
SYMBOL
CIN1
C IN2
CIN3
CIN4
CDQ1
MIN
-
-
-
-
-
MAX
20
20
73
20
17
UNITS
pF
pF
pF
pF
pF
AC CHARACTERISTICS
(
0
o
C
≤
TA
≤
70oC
,
Vcc
=
5V±10%,
See
notes
1,2.)
STANDARD OPERATION
Random read or write cycle time
Read-modify-write cycle time
Access time from /RAS
Access time from /CAS
Access time from column address
/CAS to output in Low-Z
/OE to output in Low-Z
Output buffer turn-off delay from /CAS
Transition time (rise and fall)
/RAS precharge time
/RAS pulse width
/RAS hold time
/CAS hold time
/CAS pulse width
/RAS to /CAS delay time
/RAS to column address delay time
URL:www.hbe.co.kr
REV.1.0 (August.2002)
SYMBOL
MIN
tRC
tRWC
tRAC
tCAC
tAA
tCLZ
tOLZ
tOFF
tT
tRP
tRAS
tRSH
tCSH
tCAS
tRCD
tRAD
84
116
3
3
3
2
30
50
13
38
8
20
15
-5-
-5
MAX
50
13
25
13
50
10K
10K
37
25
-6
MIN MAX
104
140
60
UNIT
ns
ns
ns
15 ns
30 ns
3 ns
3 ns
3 13
2 50
40
ns
ns
ns
60 10K
15
45
10 10K
ns
ns
ns
ns
20 45
15 30
ns
ns
HANBit Electronics Co.,Ltd.
5 Page 
HANBit
HYPER PAGE READ MODIFY WRITE CYCLE
/RAS
/CAS
A
/W
/OE
www.DataSheet4U.com
DQ
HYPER PAGE READ AND WRITE MIXED CYCLE
/RAS
/CAS
A
/W
/OE
DQ
HMD4M72D18EG
URL:www.hbe.co.kr
REV.1.0 (August.2002)
- 11 -
HANBit Electronics Co.,Ltd.
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet HMD4M72D18EG.PDF ] | |
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