PDF HYB18T512161BF Data sheet ( Hoja de datos )

Número de pieza	HYB18T512161BF
Descripción	512-Mbit x16 DDR2 SDRAM
Fabricantes	Qimonda AG
Logotipo
Hay una vista previa y un enlace de descarga de HYB18T512161BF (archivo pdf) en la parte inferior de esta página. Total 30 Páginas
No Preview Available ! HYB18T512161BF 512-Mbit x16 DDR2 SDRAM DDR2 SDRAM RoHS compliant December 2006 www.DataSheet4U.com Internet Data Sheet Rev. 1.43 1 page Internet Data Sheet www.DataSheet4U.com HYB18T512161BF–20/22/25/28/33 512-Mbit Double-Data-Rate-Two SDRAM 2 Pin Configuration 2.1 Pin Configuration The pin configuration of a DDR2 SDRAM is listed by function in Table 2. The abbreviations used in the Pin#/Buffer Type columns are explained in Table 3 and Table 4 respectively. The pin numbering for the FBGA package is depicted in Figure 1 for ×16. Ball#/Pin# Name Pin Type Clock Signals ×16 organization J8 CK I K8 CK I K2 CKE I Control Signals ×16 organization K7 RAS I L7 CAS I K3 WE I L8 CS I Address Signals ×16 organization L2 BA0 I L3 BA1 I L1 NC – Buffer Type SSTL SSTL SSTL SSTL SSTL SSTL SSTL SSTL SSTL – Function TABLE 2 Pin Configuration of DDR SDRAM Clock Signal CK, Complementary Clock Signal CK Clock Enable Row Address Strobe (RAS), Column Address Strobe (CAS), Write Enable (WE) Chip Select Bank Address Bus 1:0 Rev. 1.43, 2006-11 03292006-L40N-L04G 5 5 Page Internet Data Sheet www.DataSheet4U.com HYB18T512161BF–20/22/25/28/33 512-Mbit Double-Data-Rate-Two SDRAM Field Bits Type1) Description BT 3 w BL [2:0] w Burst Type 0B BT Sequential 1B BT Interleaved Burst Length Note: All other bit combinations are illegal. 010B BL 4 011B BL 8 1) w = write only register bits 2) Number of clock cycles for write recovery during auto-precharge. WR in clock cycles is calculated by dividing tWR (in ns) by tCK (in ns) and rounding up to the next integer: WR [cycles] ≥ tWR (ns) / tCK (ns). The mode register must be programmed to fulfill the minimum requirement for the analogue tWR timing WRMIN is determined by tCK.MAX and WRMAX is determined by tCK.MIN. Rev. 1.43, 2006-11 03292006-L40N-L04G 11 11 Page

Páginas	Total 30 Páginas
PDF Descargar	[ Datasheet HYB18T512161BF.PDF ]

Hoja de datos destacado

Número de pieza	Descripción	Fabricantes
HYB18T512161B2F-20	512-Mbit x16 DDR2 SDRAM	Qimonda AG
HYB18T512161B2F-25	512-Mbit x16 DDR2 SDRAM	Qimonda AG
HYB18T512161BF	512-Mbit x16 DDR2 SDRAM	Qimonda AG

Número de pieza	Descripción	Fabricantes
SLA6805M	High Voltage 3 phase Motor Driver IC.	Sanken
SDC1742	12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters.	Analog Devices

DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares,
permitiéndote verlos en linea o descargarlos en PDF.

DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar