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Número de pieza | CXA3355AER | |
Descripción | GPS Down Converter IC | |
Fabricantes | Sony | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de CXA3355AER (archivo pdf) en la parte inferior de esta página. Total 29 Páginas | ||
No Preview Available ! GPS Down Converter IC
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CXA3355AER
Description
The CXA3355AER is an IC developed as a GPS RF down converter. This IC realizes a reduction in the number
of external parts by integrating an LNA, image rejection mixer, IF filter, PLL and VCO (L, C) into a small
package with low current consumption.
(Applications: GPS down converter IC)
Features
Includes all functions required for the GPS down converter
Low voltage operation: VCC = 1.6 to 2.0V
Low current consumption (active mode): 11mA (Typ. at VCC = 1.8V, IF ≈ 1MHz)
Low current consumption (power save mode) < 1μA
Total gain ≈ 100dB
Total NF ≈ 4dB
On-chip VCO and PLL
Supports typical TCXO frequencies (13MHz, 16.368MHz, 18.414MHz, etc.)
On-chip LNA (LNA NF: 2.0dB)
Image rejection mixer
On-chip IF filter, and an external filter can be connected as an option for further band narrowing.
1-bit IF output
Antenna sense function
Structure
SiGe BiCMOS monolithic IC
Package
44 pin VQFN (Plastic)
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license
by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating
the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
-1-
E06702-CR
1 page Pin
No.
Symbol
Standard pin voltage [V]
DC AC
7 DATA_OUT — 1.8Vp-p
Equivalent circuit
VCC2 (IF)
CXA3355AER
www.DataSheet4U.com
Description
7 Data (IF) output.
8 VCC2 (IF)
9 GND (IF)
10 DATA
1.8
0
—
—
—
—
11 CLK
——
12 LT
——
13 CLK_OUT — 1.8Vp-p
GND (IF)
VCC2 (IF) VCC1 (PLL)
IF block VCC.
IF block GND.
Serial data input.
10
11 Serial data clock input.
12
GND (PLL)
Latch signal input.
VCC2 (IF)
TCXO clock output.
13
Leave open when not using the
TCXO clock.
GND (IF)
VCC1 (PLL)
14 TCXO
——
14
Reference frequency input.
15 GND (PLL)
16 VCC1 (PLL)
0
1.8
—
—
GND (PLL)
PLL block GND.
PLL block VCC.
-5-
5 Page CXA3355AER
Threshold Voltage Value
(VCC1 = 1.8 ± 0.2V, VCC1 ≤ VCC2 ≤ 3.3V, 2.7V ≤ VCC3 ≤ 3.3V, Ta = 25°C)
Item
Logic input voltage
high level
Logic input voltage
low level
Symbol
VIH
VIL
Conditions
Logic input pins = Pin 10 (DATA),
Pin 11 (CLK),
Pin 12 (LT)
Logic input pins = Pin 10 (DATA),
Pin 11 (CLK),
Pin 12 (LT)
Logic output voltage
high level
VOH
Logic output voltage
low level
VOL
Logic output pin = Pin 2 (DIAG)
Logic output pins = Pin 7 (DATA_OUT),
Pin 13 (CLK_OUT)
Logic output pins = Pin 7 (DATA_OUT),
Pin 13 (CLK_OUT)
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Min. Typ. Max.
VCC2
– 0.2
—
VCC2
+ 0.2
Unit
V
–0.1 — 0.2
VCC3
– 0.2
—
VCC3
VCC2
– 0.2
—
VCC2
0 — 0.2
V
V
V
V
Threshold Voltage Value (Antenna Sense)
(VCC1 = VCC2 = 1.8V, VCC3 = 3V, Ta = 25°C)
Item
Threshold voltage 1
Threshold voltage 2
Symbol
Vs1
Vs2
Conditions
Threshold voltage at which connection
of the prescribed load is detected from
the open status
Threshold voltage for switching to the
short status from the prescribed load
connected status
Min. Typ. Max. Unit
10 30 60 mV
140 170 200 mV
- 11 -
11 Page |
Páginas | Total 29 Páginas | |
PDF Descargar | [ Datasheet CXA3355AER.PDF ] |
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