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Número de pieza | IS41C4400x | |
Descripción | 4M x 4 (16-MBIT) DYNAMIC RAM WITH EDO PAGE MODE | |
Fabricantes | Integrated Silicon Solution | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de IS41C4400x (archivo pdf) en la parte inferior de esta página. Total 19 Páginas | ||
No Preview Available ! IS41C4400X
IS41LV4400X SERIES
4M x 4 (16-MBIT) DYNAMIC RAM
WITH EDO PAGE MODE
ISSI®
www.DataSheet4U.com
JUNE, 2001
FEATURES
• Extended Data-Out (EDO) Page Mode access cycle
• TTL compatible inputs and outputs
• Refresh Interval:
– 2,048 cycles/32 ms
– 4,096 cycles/64 ms
• Refresh Mode: RAS-Only,
CAS-before-RAS (CBR), and Hidden
• Single power supply:
– 5V±10% or 3.3V ± 10%
• Byte Write and Byte Read operation via two CAS
• Industrial temperature range -40°C to 85°C
DESCRIPTION
The ISSI 4400 Series is a 4,194,304 x 4-bit high-performance
CMOS Dynamic Random Access Memory. These
devices offer an accelerated cycle access called EDO
Page Mode. EDO Page Mode allows 2,048 or 4096
random accesses within a single row with access cycle
time as short as 20 ns per 4-bit word.
These features make the 4400 Series ideally suited for
high-bandwidth graphics, digital signal processing,
high-performance computing systems, and peripheral
applications.
The 4400 Series is packaged in a 24-pin 300-mil SOJ with
JEDEC standard pinouts.
PRODUCT SERIES OVERVIEW
Part No.
IS41C44002
IS41C44004
IS41LV44002
IS41LV44004
Refresh
2K
4K
2K
4K
Voltage
5V ± 10%
5V ± 10%
3.3V ± 10%
3.3V ± 10%
KEY TIMING PARAMETERS
Parameter
RAS Access Time (tRAC)
CAS Access Time (tCAC)
Column Address Access Time (tAA)
EDO Page Mode Cycle Time (tPC)
Read/Write Cycle Time (tRC)
-50
50
13
25
20
84
-60 Unit
60 ns
15 ns
30 ns
25 ns
104 ns
PIN CONFIGURATION
24 Pin SOJ
VCC
I/O0
I/O1
WE
RAS
*A11(NC)
1
2
3
4
5
6
A10
A0
A1
A2
A3
VCC
7
8
9
10
11
12
24 GND
23 I/O3
22 I/O2
21 CAS
20 OE
19 A9
18 A8
17 A7
16 A6
15 A5
14 A4
13 GND
PIN DESCRIPTIONS
A0-A11
A0-A10
I/O0-3
WE
OE
RAS
CAS
Vcc
GND
NC
Address Inputs (4K Refresh)
Address Inputs (2K Refresh)
Data Inputs/Outputs
Write Enable
Output Enable
Row Address Strobe
Column Address Strobe
Power
Ground
No Connection
* A11 is NC for 2K Refresh devices.
ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any
errors which may appear in this publication. © Copyright 2000, Integrated Silicon Solution, Inc.
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. D
06/24/01
1
1 page IS41C4400X
IS41LV4400X SERIES
ISSI ®
www.DataSheet4U.com
ELECTRICAL CHARACTERISTICS(1)
(Recommended Operating Conditions unless otherwise noted.)
Symbol
IIL
Parameter
Input Leakage Current
Test Condition
Any input 0V ≤ VIN ≤ Vcc
Other inputs not under test = 0V
VCC Speed Min. Max. Unit
–5 5 µA
IIO
Output Leakage Current
Output is disabled (Hi-Z)
0V ≤ VOUT ≤ Vcc
–5 5 µA
VOH Output High Voltage Level
IOH = –5.0 mA, Vcc = 5V
IOH = –2.0 mA, Vcc = 3.3V
2.4 —
V
VOL Output Low Voltage Level
IOL = 4.2 mA, Vcc = 5V
IOL = 2 mA, Vcc = 3.3V
— 0.4 V
ICC1
Standby Current: TTL
RAS, CAS ≥ VIH Commercial
Industrial
5V
3.3V
5V
3.3V
— 2 mA
— 0.5
—3
—2
ICC2
Standby Current: CMOS
RAS, CAS ≥ VCC – 0.2V
5V
3.3V
— 1 mA
— 0.5
ICC3
Operating Current:
Random Read/Write(2,3,4)
Average Power Supply Current
RAS, CAS,
Address Cycling, tRC = tRC (min.)
-50 — 120 mA
-60 — 110
ICC4
Operating Current:
EDO Page Mode(2,3,4)
Average Power Supply Current
RAS = VIL, CAS,
Cycling tPC = tPC (min.)
-50 —
-60 —
90 mA
80
ICC5
Refresh Current:
RAS-Only(2,3)
Average Power Supply Current
RAS Cycling, CAS ≥ VIH
tRC = tRC (min.)
-50 — 120 mA
-60 — 110
ICC6
Refresh Current:
CBR(2,3,5)
Average Power Supply Current
RAS, CAS Cycling
tRC = tRC (min.)
-50 — 120 mA
-60 — 110
Notes:
1. An initial pause of 200 µs is required after power-up followed by eight RAS refresh cycles (RAS-Only or CBR) before proper device
operation is assured. The eight RAS cycles wake-up should be repeated any time the tREF refresh requirement is exceeded.
2. Dependent on cycle rates.
3. Specified values are obtained with minimum cycle time and the output open.
4. Column-address is changed once each EDO page cycle.
5. Enables on-chip refresh and address counters.
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. D
06/24/01
5
5 Page IS41C4400X
IS41LV4400X SERIES
READ WRITE CYCLE (LATE WRITE and READ-MODIFY-WRITE Cycles)
ISSI ®
www.DataSheet4U.com
RAS
tCRP
CAS
tASR
ADDRESS
WE
I/O
OE
Row
tRWC
tRAS
tRP
tRCD
tCSH
tRSH
tCAS tCLCH
tRAD
tRAH
tAR
tASC
tCAH
tRAL
tACH
tRCS
Column
tRWD
tCWD
tAWD
Row
tCWL
tRWL
tWP
Open
tRAC
tCAC
tCLZ
tAA
tOE
tDS tDH
Valid DOUT Valid DIN
Open
tOD tOEH
Don’t Care
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. D
06/24/01
11
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IS41C4400x | 4M x 4 (16-MBIT) DYNAMIC RAM WITH EDO PAGE MODE | Integrated Silicon Solution |
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