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Número de pieza | HYS72T64020HR | |
Descripción | 240-Pin Registered DDR2 SDRAM Modules | |
Fabricantes | Qimonda AG | |
Logotipo | ||
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HYS72T32000HR–[2.5/3/3S/3.7/5]–A
HYS72T64001HR–[2.5/3/3S/3.7/5]–A
HYS72T64020HR–[2.5/3/3S/3.7/5]–A
240-Pin Registered DDR2 SDRAM Modules
DDR2 SDRAM
RDIMM SDRAM
RoHS Compliant
Internet Data Sheet
Rev. 1.21
1 page Internet Data Sheet
www.DataSheet4U.com
HYS72T[32/64]0xxHR–[2.5/3/3S/3.7/5]–A
Registered DDR2 SDRAM Modules
1.2 Description
The QIMONDA HYS72T[32/64]0xxHR–[2.5/3/3S/3.7/5]–A
module family are Registered DIMM modules “RDIMMs” with
30 mm height based on DDR2 technology. DIMMs are
available as ECC modules in 32M x 72 (256 MByte) and
64M x 72 (512 MByte) organization and density, intended for
mounting into 240-pin connector sockets.
The memory array is designed with 256-Mbit Double-Data-
Rate-Two (DDR2) Synchronous DRAMs. All control and
address signals are re-driven on the DIMM using register
devices and a PLL for the clock distribution. This reduces
capacitive loading to the system bus, but adds one cycle to
the SDRAM timing. Decoupling capacitors are mounted on
the PCB board. The DIMMs feature serial presence detect
based on a serial E2PROM device using the 2-pin I2C
protocol. The first 128 bytes are programmed with
configuration data and are write-protected; the second
128 bytes are available to the customer.
Product Type1)
Compliance Code2)
TABLE 3
Ordering Information for RoHS Compliant Products
Description SDRAM Technology
PC2-6400
HYS72T32000HR–2.5–A
256 MB 1R×8 PC2–6400R–666–12–F0
1 Rank, ECC 256 Mbit (×8)
HYS72T64001HR–2.5–A
512 MB 1R×4 PC2–6400R–666–12–H0
1 Rank, ECC 256 Mbit (×4)
HYS72T64020HR–2.5–A
512 MB 2R×8 PC2–6400R–666–12–G0
2 Rank, ECC 256 Mbit (×8)
PC2-5300
HYS72T32000HR–3–A
256 MB 1R×8 PC2–5300R–444–12–F0
1 Rank, ECC 256 Mbit (×8)
HYS72T64001HR–3–A
512 MB 1R×4 PC2–5300R–444–12–H0
1 Rank, ECC 256 Mbit (×4)
HYS72T64020HR–3–A
512 MB 2R×8 PC2–5300R–444–12–G0
2 Rank, ECC 256 Mbit (×8)
HYS72T32000HR–3S–A
256 MB 1R×8 PC2–5300R–555–12–F0
1 Rank, ECC 256 Mbit (×8)
HYS72T64001HR–3S–A
512 MB 1R×4 PC2–5300R–555–12–H0
1 Rank, ECC 256 Mbit (×4)
HYS72T64020HR–3S–A
512 MB 2R×8 PC2–5300R–555–12–G0
2 Rank, ECC 256 Mbit (×8)
PC2–4200
HYS72T32000HR–3.7–A
256 MB 1R×8 PC2–4200R–444–11–F0
1 rank, ECC 256 Mbit (×8)
HYS72T64001HR–3.7–A
512 MB 1R×4 PC2–4200R–444–11–H0
1 rank, ECC 256 Mbit (×4)
HYS72T64020HR–3.7–A
512 MB 2R×8 PC2–4200R–444–11–G0
2 rank, ECC 256 Mbit (×8)
PC2-3200
HYS72T32000HR–5–A
256 MB 1R×8 PC2–3200R–333–11–F0
1 Rank, ECC 256 Mbit (×8)
HYS72T64001HR–5–A
512 MB 1R×4 PC2–3200R–333–11–H0
1 Rank, ECC 256 Mbit (×4)
HYS72T64020HR–5–A
512 MB 2R×8 PC2–3200R–333–11–G0
2 Rank, ECC 256 Mbit (×8)
1) All part numbers end with a place code, designating the silicon die revision. Example: HYS72T32000HR–5–A, indicating Rev. “A” dies are
used for DDR2 SDRAM components. For all QIMONDA DDR2 module and component nomenclature see Chapter 6 of this data sheet.
2) The Compliance Code is printed on the module label and describes the speed grade, for example “PC2–4200R–444–11–F0”, where
4200R means Registered DIMM modules with 4.26 GB/sec Module Bandwidth and “444-11” means Column Address Strobe (CAS) latency
= 4, Row Column Delay (RCD) latency = 4 and Row Precharge (RP) latency = 4 using the latest JEDEC SPD Revision 1.1 and produced
on the Raw Card “F”
Rev. 1.21, 2007-03
09152006-J5FK-C565
5
5 Page Internet Data Sheet
www.DataSheet4U.com
HYS72T[32/64]0xxHR–[2.5/3/3S/3.7/5]–A
Registered DDR2 SDRAM Modules
Ball No.
Name
Data Strobe Bus
7
6
16
15
28
27
37
36
84
83
93
92
105
104
114
113
46
45
125
126
134
135
146
147
155
156
202
203
211
212
223
224
232
233
164
165
DQS0
DQS0
DQS1
DQS1
DQS2
DQS2
DQS3
DQS3
DQS4
DQS4
DQS5
DQS5
DQS6
DQS6
DQS7
DQS7
DQS8
DQS8
DQS9
DQS9
DQS10
DQS10
DQS11
DQS11
DQS12
DQS12
DQS13
DQS13
DQS14
DQS14
DQS15
DQS15
DQS16
DQS16
DQS17
DQS17
Pin Buffer Function
Type Type
I/O SSTL Data Strobes 17:0
I/O SSTL
I/O SSTL
I/O SSTL
I/O SSTL
I/O SSTL
I/O SSTL
I/O SSTL
I/O SSTL
I/O SSTL
I/O SSTL
I/O SSTL
I/O SSTL
I/O SSTL
I/O SSTL
I/O SSTL
I/O SSTL
I/O SSTL
I/O SSTL
I/O SSTL
I/O SSTL
I/O SSTL
I/O SSTL
I/O SSTL
I/O SSTL
I/O SSTL
I/O SSTL
I/O SSTL
I/O SSTL
I/O SSTL
I/O SSTL
I/O SSTL
I/O SSTL
I/O SSTL
I/O SSTL
I/O SSTL
Rev. 1.21, 2007-03
09152006-J5FK-C565
11
11 Page |
Páginas | Total 67 Páginas | |
PDF Descargar | [ Datasheet HYS72T64020HR.PDF ] |
Número de pieza | Descripción | Fabricantes |
HYS72T64020HP | 240-Pin Registered DDR2 SDRAM Modules | Qimonda AG |
HYS72T64020HR | 240-Pin Registered DDR2 SDRAM Modules | Qimonda AG |
HYS72T64020HU | 240-Pin Unbuffered DDR2 SDRAM Modules | Qimonda AG |
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