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Número de pieza | CY25822-2 | |
Descripción | CK-SSC Spread Spectrum Clock Generator | |
Fabricantes | Cypress Semiconductor | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de CY25822-2 (archivo pdf) en la parte inferior de esta página. Total 9 Páginas | ||
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CY25822-2
CK-SSC Spread Spectrum Clock Generator
Features
• 3.3V operation
• 48- and 66-MHz frequency support
• Selectable slew rate control
• 350-pS jitter
• I2C programmability
• 500-µA power-down current
• Spread Spectrum for best electromagnetic interference
(EMI) reduction
• 8-pin SOIC package
Block Diagram
VDD
Clock Input
SDATA
SCLOCK
PWRDWN#
Freq.
Divider
M
Logic
Control
Phase
Detector
Charge
Pump
Σ
VCO
Post
Dividers
Feedback
Divider
N
Modulating
Waveform
PLL
REFOUT
CLKOUT
(SSCG Output)
Pin Configuration
GND
C LKIN 1
8 *PW RDW N#
VDD 2
GND 3
C Y 258 22-2
7 SCLOCK
6 SDATA
CLKOUT 4
5 REFOUT
* 150 K Ω P u ll-u p
Cypress Semiconductor Corporation
Document #: 38-07531 Rev. **
• 3901 North First Street • San Jose, CA 95134 • 408-943-2600
Revised March 18, 2003
1 page PWRDWN#
CLKOUT
REFOUT
Figure 1. Power-down Assertion
PD#
CLKOUT
REFOUT
< 3.0 m s
Figure 2. Power-down Deassertion
CLKOUT and REFOUT Enable Clarification
The CLKOUT enable and REFOUT enable I2C register bits are
used to shot-off the CLKOUT and REFOUT clocks individually.
The VCO and crystal oscillator must remain on. A shutdown
clock is driven low. ALL clocks need to be stopped in a
predictable manner. All clocks need to be shutdown without
any glitches or other abnormal behavior while transitioning to
a stopped state. Similarly when CLKOUT or REFOUT is
enabled the clock must start in a predictable manner without
any glitches or abnormal behavior.
www.DCatYaS2he5e8t42U.2co-m2
Document #: 38-07531 Rev. **
Page 5 of 9
5 Page |
Páginas | Total 9 Páginas | |
PDF Descargar | [ Datasheet CY25822-2.PDF ] |
Número de pieza | Descripción | Fabricantes |
CY25822-2 | CK-SSC Spread Spectrum Clock Generator | Cypress Semiconductor |
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