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PDF HT82M99AE Data sheet ( Hoja de datos )
| Número de pieza | HT82M99AE | |
| Descripción | USB Mouse Encoder 8-Bit MCU | |
| Fabricantes | Holtek Semiconductor | |
| Logotipo |  |
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HT82M99EE/HT82Mww9w.D9aAtaSEheet4U.com
USB Mouse Encoder 8-Bit MCU
Technical Document
· Tools Information
· FAQs
· Application Note
Features
· Flexible total solution for applications that combine
PS/2 and low-speed USB interface, such as mice,
joysticks, and many others
· USB Specification Compliance
- Conforms to USB specification V1.1
- Conforms to USB HID specification V1.1
· Supports 1 Low-speed USB control endpoint and 1
interrupt endpoint
· Each endpoint has 8´8 bytes FIFO
· Integrated USB transceiver
· 3.3V regulator output
· External 6MHz or 12MHz ceramic resonator or crys-
tal
· 8-bit RISC microcontroller, with 2K´14 program
memory (000H~7FFH)
· 96 bytes RAM (20H~7FH)
· 128´8 data EEPROM
· 6MHz/12MHz internal CPU clock
· 4-level stacks
· Two 7-bit indirect addressing registers
· One 16-bit programmable timer counter with over-
flow interrupt (shared with PA7, vector 0CH)
· One USB interrupt input (vector 04H)
· HALT function and wake-up feature reduce power
consumption
· PA0~PA7, PB4 and PB7 support wake-up function
· Internal Power-On reset (POR)
· Watchdog Timer (WDT)
· 12 I/O ports
· 20-pin DIP/SOP package
General Description
The USB MCU HT82M99EE/HT82M99AE are suitable
for USB mouse and USB joystick devices. It consists of
a Holtek high performance 8-bit MCU core for control
unit, built-in USB SIE, 2K´14 program memory and 96
bytes data RAM.
The mask version HT82M99AE is fully pin and function-
ally compatible with the OTP version HT82M99EE de-
vice.
There are two dice in the HT82M99EE/HT82M99AE
package: one is the HT82M99EE/HT82M99AE MCU,
the other is a 128´8 bits EEPROM used for data mem-
ory purpose. The two dice are wire-bonded to form
HT82M99EE/HT82M99AE.
Rev. 1.00
1 February 8, 2006
1 page  
HT82M99EE/HTw8w2wM.D9at9aAShEeet4U.com
EEPROM A.C. Characteristics
Ta=25°C
Symbol
Parameter
Remark
Standard Mode* VCC=5V±10%
Min. Max. Min. Max.
fSK Clock Frequency
¾ ¾ 100 ¾ 400
tHIGH Clock High Time
¾ 4000 ¾ 600 ¾
tLOW
Clock Low Time
¾
4700
¾ 1200 ¾
tr
SDA and SCL Rise Time
Note
¾ 1000 ¾ 300
tf
SDA and SCL Fall Time
Note
¾ 300 ¾ 300
tHD:STA START Condition Hold Time
After this period the first
clock pulse is generated
4000
¾
600
¾
tSU:STA
START Condition Setup Time
Only relevant for repeated
START condition
4000
¾
600
¾
tHD:DAT Data Input Hold Time
¾ 0 ¾ 0¾
tSU:DAT Data Input Setup Time
¾ 200 ¾ 100 ¾
tSU:STO STOP Condition Setup Time
¾ 4000 ¾ 600 ¾
tAA Output Valid from Clock
¾ ¾ 3500 ¾ 900
tBUF Bus Free Time
Time in which the bus must
be free before a new trans- 4700
mission can start
¾ 1200 ¾
tSP
Input Filter Time Constant
(SDA and SCL Pins)
Noise suppression time
¾
100 ¾ 50
tWR Write Cycle Time
¾ ¾ 5 ¾5
Note: These parameters are periodically sampled but not 100% tested
* The standard mode means VCC=2.2V to 5.5V
For relative timing, refer to timing diagrams
Unit
kHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
Rev. 1.00
5 February 8, 2006
5 Page 
HT82M99EE/HTw8w2wM.D9at9aAShEeet4U.com
When the interrupt is enabled, the stack is not full and
the external interrupt is active, a subroutine call to loca-
tion 04H will occur. The interrupt request flag (USBF)
and EMI bits will be cleared to disable other interrupts.
When the PC Host access the FIFO of the HT82M99EE/
HT82M99AE, the corresponding request bit of the USR
is set, and a USB interrupt is triggered. So user can eas-
ily decide which FIFO is accessed. When the interrupt
has been served, the corresponding bit should be
cleared by firmware. When the HT8M99E receives a
USB Suspend signal from the Host PC, the suspend line
(bit0 of the USC) of the HT8M99E is set and a USB inter-
rupt is also triggered.
When the HT82M99EE/HT82M99AE receives a Re-
sume signal from the Host PC, the resume line (bit3 of
the USC) of the HT82M99EE/HT82M99AE are set and
a USB interrupt is triggered.
Whenever a USB reset signal is detected, the USB in-
terrupt is triggered and URST_Flag bit of the USC regis-
ter is set. When the interrupt has been served, the bit
should be cleared by firmware.
The internal timer/even counter interrupt is initialized by
setting the timer/event counter interrupt request flag (;bit
6 of the INTC), caused by a timer overflow. When the in-
terrupt is enabled, the stack is not full and the TF is set, a
subroutine call to location 0CH will occur. The related in-
terrupt request flag (TF) will be reset and the EMI bit
cleared to disable further interrupts.
During the execution of an interrupt subroutine, other in-
terrupt acknowledge signals are held until the ²RETI² in-
struction is executed or the EMI bit and the related
interrupt control bit are set to 1 (if the stack is not full). To
return from the interrupt subroutine, ²RET² or ²RETI²
may be invoked. RETI will set the EMI bit to enable an
interrupt service, but RET will not.
Interrupts, occurring in the interval between the rising
edges of two consecutive T2 pulses, will be serviced on
the latter of the two T2 pulses, if the corresponding inter-
rupts are enabled. In the case of simultaneous requests
the following table shows the priority that is applied.
These can be masked by resetting the EMI bit.
No. Interrupt Source Priority Vector
a USB interrupt
1 04H
b Timer/Event Counter overflow
2 0CH
The timer/event counter interrupt request flag (TF), USB
interrupt request flag (USBF), enable timer/event coun-
ter interrupt bit (ETI), enable USB interrupt bit (EUI) and
enable master interrupt bit (EMI) constitute an interrupt
control register (INTC) which is located at 0BH in the
data memory. EMI, EUI and ETI are used to control the
enabling/disabling of interrupts. These bits prevent the
requested interrupt from being serviced. Once the inter-
rupt request flags (TF, USBF) are set, they will remain in
the INTC register until the interrupts are serviced or
cleared by a software instruction.
It is recommended that a program does not use the
²CALL subroutine² within the interrupt subroutine. Inter-
rupts often occur in an unpredictable manner or need to
be serviced immediately in some applications. If only
one stack is left and enabling the interrupt is not well
controlled, the original control sequence will be dam-
aged once the ²CALL² operates in the interrupt subrou-
tine.
Oscillator Configuration
There is an oscillator circuit in the microcontroller.
O SC1
O SC2
C r y s ta l O s c illa to r
System Oscillator
This oscillator is designed for system clocks. The HALT
mode stops the system oscillator and ignores an exter-
nal signal to conserve power.
A crystal across OSC1 and OSC2 is needed to provide
the feedback and phase shift required for the oscillator.
No other external components are required. In stead of
a crystal, a resonator can also be connected between
OSC1 and OSC2 to get a frequency reference, but two
external capacitors in OSC1 and OSC2 are required.
The HT82M99EE/HT82M99AE can operate in 6MHz or
12MHz system clocks. In order to make sure that the
USB SIE functions properly, user should correctly con-
figure the SCLKSEL bit of the SCC Register. The default
system clock is 12MHz.
The WDT oscillator is a free running on-chip RC oscilla-
tor, and no external components are required. Even if
the system enters the power down mode, the system
clock is stopped, but the WDT oscillator still works within
a period of approximately 31ms. The WDT oscillator can
be disabled by ROM code option to conserve power.
Watchdog Timer - WDT
The WDT clock source is implemented by a dedicated
RC oscillator (WDT oscillator), or instruction clock (sys-
tem clock divided by 4), determine by ROM code option.
This timer is designed to prevent a software malfunction
or sequence from jumping to an unknown location with
unpredictable results. The Watchdog Timer can be dis-
abled by ROM code option. If the Watchdog Timer is dis-
abled, all the executions related to the WDT result in no
operation.
Once the internal WDT oscillator (RC oscillator with a
period of 31ms/5V normally) is selected, it is first divided
by 256 (8-stage) to get the nominal time-out period of
Rev. 1.00
11 February 8, 2006
11 Page | ||
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| PDF Descargar | [ Datasheet HT82M99AE.PDF ] | |
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