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PDF TK40J60T Data sheet ( Hoja de datos )
| Número de pieza | TK40J60T | |
| Descripción | Field Effect Transistor Silicon N Channel MOS Type | |
| Fabricantes | Toshiba Semiconductor | |
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TK40J60T
TOSHIBA Field Effect Transistor Silicon N Channel MOS Type (DTMwwOwS.)DataSheet4U.com
TK40J60T
Switching Regulator Applications
• Low drain-source ON resistance: RDS (ON) = 0.068Ω (typ.)
• High forward transfer admittance: ⎪Yfs⎪ = 25 S (typ.)
• Low leakage current: IDSS = 100 μA (VDS = 600 V)
• Enhancement-mode: Vth = 3.0~5.0 V (VDS = 10 V, ID = 1 mA)
Absolute Maximum Ratings (Ta = 25°C)
Characteristics
Drain-source voltage
Gate-source voltage
Drain current
DC (Note 1)
Pulse (t = 1 ms)
(Note 1)
Drain power dissipation (Tc = 25°C)
Single pulse avalanche energy
(Note 2)
Avalanche current
(Note 3)
Repetitive avalanche energy
Channel temperature
Storage temperature range
Symbol
VDSS
VGSS
ID
IDP
PD
EAS
IAR
EAR
Tch
Tstg
Rating
600
±30
40
80
400
576
40
40
150
-55~150
Unit
V
V
A
W
mJ
A
mJ
°C
°C
15.9max.
Unit: mm
Ф3.2±0.2
2.0±0.3
1.0
＋0.3
－0.25
5.45±0.2
5.45±0.2
12 3
1. Gate
2. Drain(heat sink)
3. Source
JEDEC
JEITA
⎯
SC-65
TOSHIBA
2-16C1B
Weight : 4.6 g (typ.)
Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings.Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability
Handbook (“Handling Precautions”/’’Derating Concept and Methods’’) and individual reliability data (i.e.
reliability test report and estimated failure rate, etc).
Thermal Characteristics
Characteristics
Thermal resistance, channel to case
Thermal resistance, channel to ambient
Symbol
Rth (ch-c)
Rth (ch-a)
Max
0.313
50
Unit
°C/W
°C/W
2
Note 1: Please use devices on conditions that the channel temperature is below 150°C.
Note 2: VDD = 90 V, Tch = 25 °C (initial), L = 0.63 mH, RG = 25 Ω, IAR = 40 A
Note 3: Repetitive rating: pulse width limited by maximum channel temperature
This transistor is an electrostatic sensitive device. Please handle with caution.
1
3
1 2007-08-30
1 page  
TK40J60T
www.DataSheet4U.com
rth – tw
10
1
Duty=0.5
0.2
0.1
0.1 0.05
0.02
0.01
10μ
0.01
100μ
SINGLE PULSE
PDM
t
T
Duty = t/T
Rth (ch-c) = 0.313°C/W
1m
10m
100m
1
10
Pulse width tw (s)
SAFE OPERATING AREA
1000
100 ID max (pulse) *
ID max (continuous)
10
DC OPEATION
Tc = 25°C
1
100 μs *
1 ms *
0.1 ※ Single pulse Ta=25℃
Curves must be derated
linearly with increase in
temperature.
0.01
1
10
VDSS max
100
Drain-source voltage VDS (V)
1000
EAS – Tch
800
600
400
200
0
25 50
75 100
Channel temperature (initial)
125 150
Tch (°C)
15 V
−15 V
BVDSS
IAR
VDD
VDS
TEST CURCUIT
WAVE FORM
RG = 25 Ω
VDD = 90 V, L = 0.63 mH
ΕAS
=
1
2
⋅L ⋅I2
⋅ ⎜⎜⎝⎛
BVDSS
BVDSS − VDD
⎟⎟⎠⎞
5 2007-08-30
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet TK40J60T.PDF ] | |
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