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PDF MMA1220KEG Data sheet ( Hoja de datos )
| Número de pieza | MMA1220KEG | |
| Descripción | Low G Micromachined Accelerometer | |
| Fabricantes | Freescale Semiconductor | |
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Freescale Semiconductor
Technical Data
Low G
Micromachined Accelerometer
The MMA series of silicon capacitive, micromachined accelerometers feature
signal conditioning, a 4-pole low pass filter and temperature compensation.
Zero-g offset full scale span and filter cut-off are factory set and require no
external devices. A full system self-test capability verifies system functionality.
Features
• Integral Signal Conditioning
• Linear Output
• Ratiometric Performance
• 4th Order Bessel Filter Preserves Pulse Shape Integrity
• Calibrated Self-test
• Low Voltage Detect, Clock Monitor, and EPROM Parity Check Status
• Transducer Hermetically Sealed at Wafer Level for Superior Reliability
• Robust Design, High Shocks Survivability
• Qualified AEC-Q100, Rev. F Grade 2 (-40°C/ +105°C)
Typical Applications
• Vibration Monitoring and Recording
• Appliance Control
• Mechanical Bearing Monitoring
• Computer Hard Drive Protection
• Computer Mouse and Joysticks
• Virtual Reality Input Devices
• Sport Diagnostic Devices and Systems
Device Name
MMA1220KEG
www.DaMtaMSAhe1e2t240UK.EcoGmR2
ORDERING INFORMATION
Temperature Range Case No.
–40° to 125°C
475-01
–40° to 125°C
475-01
Package
SOIC-16
SOIC-16, Tape & Reel
MMA1220KEG
Rev 0, 11/2009
MMA1220KEG
MMA1220KEG: Z-AXIS SENSITIVITY
MICROMACHINED
ACCELEROMETER
±8g
KEG SUFFIX (Pb-FREE)
16-LEAD SOIC
CASE 475-01
G-Cell
Sensor
ST
Self-test
Integrator
Temp Comp
Gain Filter
and Gain
VDD
VOUT
Control Logic &
EPROM Trim Circuits
Oscillator
Clock
Generator
VSS
STATUS
Figure 1. Simplified Accelerometer Functional Block Diagram
N/C
N/C
N/C
ST
VOUT
STATUS
VSS
VDD
1
2
3
4
5
6
7
8
16 N/C
15 N/C
14 N/C
13 N/C
12 N/C
11 N/C
10 N/C
9 N/C
Figure 2. Pin Connections
© Freescale Semiconductor, Inc., 2009. All rights reserved.
1 page  
Pinout Description
BASIC CONNECTIONS
PCB Layout
N/C
N/C
N/C
ST
VOUT
STATUS
VSS
VDD
1
2
3
4
5
6
7
8
16 N/C
15 N/C
14 N/C
13 N/C
12 N/C
11 N/C
10 N/C
9 N/C
Table 3. Pin Descriptions
Pin No. Pin Name
Description
1 thru 3
4
— Redundant VSS. Leave unconnected.
ST Logic input pin used to initiate self-test.
5 VOUT Output voltage of the accelerometer.
6 STATUS Logic output pin to indicate fault.
7
8
9 thru 13
VSS The power supply ground.
VDD The power supply input.
Trim Pins Used for factory trim. Leave
unconnected.
14 thru 16
— No internal connection. Leave
unconnected.
VDD
Logic
www.DataSheetI4nUpu.ct om
C1
0.1 μF
4
MMA1220KEG
ST
8 VDD
VOUT
7 VSS
6
R1
1 kΩ
5
C2
0.01 μF
STATUS
Output
Signal
STATUS
P1
ST P0
VOUT
VSS
VDD
R A/D In
1 kΩ C 0.01 μF
C 0.1 μF
VRH
C 0.1 μF
VSS
C 0.1 μF
VDD
Power Supply
Figure 6. Recommended PCB Layout for Interfacing
Accelerometer to Microcontroller
NOTES:
1. Use a 0.1 μF capacitor on VDD to decouple the power
source.
2. Physical coupling distance of the accelerometer to the
microcontroller should be minimal.
3. Place a ground plane beneath the accelerometer to
reduce noise, the ground plane should be attached to
all of the open ended terminals shown in Figure 6.
4. Use an RC filter of 1 kΩ and 0.01 μF on the output of
the accelerometer to minimize clock noise (from the
switched capacitor filter circuit).
5. PCB layout of power and ground should not couple
power supply noise.
6. Accelerometer and microcontroller should not be a
high current path.
7. A/D sampling rate and any external power supply
switching frequency should be selected such that they
do not interfere with the internal accelerometer
sampling frequency. This will prevent aliasing errors.
Figure 5. SOIC Accelerometer with Recommended
Connection Diagram
Sensors
Freescale Semiconductor
MMA1220KEG
5
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| PDF Descargar | [ Datasheet MMA1220KEG.PDF ] | |
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