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PDF MC9S08AC128 Data sheet ( Hoja de datos )
| Número de pieza | MC9S08AC128 | |
| Descripción | 8-Bit Microcontroller | |
| Fabricantes | Freescale Semiconductor | |
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Freescale Semiconductor
Data Sheet: Advanced Information
Document Number: MC9S08AC128
Rev. 1, 9/2008
MC9S08AC128 8-Bit
Microcontroller Data Sheet
This document contains information on a new
product. Specifications and information herein
are subject to change without notice.
MC9S08AC128
917A-03
840B-01
824D-02
8-Bit HCS08 Central Processor Unit (CPU)
• 40-MHz HCS08 CPU (central processor unit)
• 20-MHz internal bus frequency
• HC08 instruction set with added BGND, CALL and
RTC instructions
• Memory Management Unit to support paged
memory.
• Linear Address Pointer to allow direct page data
accesses of the entire memory map
Development Support
• Background debugging system
• Breakpoint capability to allow single breakpoint
setting during in-circuit debugging (plus two more
breakpoints in on-chip debug module)
• On-chip in-circuit emulator (ICE) Debug module
containing three comparators and nine trigger
modes. Eight deep FIFO for storing change-of-flow
addresses and event-only data. Supports both tag
and force breakpoints.
Memory Options
• Up to 128K FLASH — read/program/erase over full
operating voltage and temperature
• Up to 8K Random-access memory (RAM)
www.DataSh•eet4US.eccoumrity circuitry to prevent unauthorized access to
RAM and FLASH contents
Clock Source Options
• Clock source options include crystal, resonator,
external clock, or internally generated clock with
precision NVM trimming using ICG module
System Protection
• Optional computer operating properly (COP) reset
with option to run from independent internal clock
source or bus clock
• CRC module to support fast cyclic redundancy
checks on system memory
• Low-voltage detection with reset or interrupt
• Illegal opcode detection with reset
• Master reset pin and power-on reset (POR)
Power-Saving Modes
• Wait plus two stops
Peripherals
• ADC — 16-channel, 10-bit resolution, 2.5 μs
conversion time, automatic compare function,
temperature sensor, internal bandgap reference
channel
• SCIx — Two serial communications interface
modules supporting LIN 2.0 Protocol and SAE J2602
protocols; Full duplex non-return to zero (NRZ);
Master extended break generation; Slave extended
break detection; Wakeup on active edge
• SPIx — One full and one master-only serial
peripheral interface modules; Full-duplex or
single-wire bidirectional; Double-buffered transmit
and receive; Master or Slave mode; MSB-first or
LSB-first shifting
• IIC — Inter-integrated circuit bus module; Up to 100
kbps with maximum bus loading; Multi-master
operation; Programmable slave address; Interrupt
driven byte-by-byte data transfer; supports broadcast
mode and 10 bit addressing
• TPMx — One 2-channel and two 6-channel 16-bit
timer/pulse-width modulator (TPM) modules:
Selectable input capture, output compare, and
edge-aligned PWM capability on each channel. Each
timer module may be configured for buffered,
centered PWM (CPWM) on all channels
• KBI — 8-pin keyboard interrupt module
Input/Output
• Up to 70 general-purpose input/output pins
• Software selectable pullups on input port pins
• Software selectable drive strength and slew rate
control on ports when used as outputs
Package Options
• 80-pin low-profile quad flat package (LQFP)
• 64-pin quad flat package (QFP)
• 44-pin low-profile quad flat package (LQFP)
This document contains information on a new product. Specifications and information herein
are subject to change without notice.
© Freescale Semiconductor, Inc., 2007-2008. All rights reserved.
Preliminary — Subject to Change
1 page  
Chapter 2
Pins and Connections
This section describes signals that connect to package pins. It includes pinout diagrams, recommended
system connections, and detailed discussions of signals.
2.1 Device Pin Assignment
Figure 2-1 shows the 80-pin LQFP package pin assignments for the MC9S08AC128 Series device.
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PTC4
IRQ/TPMCLK
RESET
PTF0/TPM1CH2
PTF1/TPM1CH3
PTF2/TPM1CH4
PTF3/TPM1CH5
PTF4/TPM2CH0
PTC6
PTF7
PTF5/TPM2CH1
PTF6
PTJ0
PTJ1
PTJ2
PTJ3
PTE0/TxD1
PTE1/RxD1
PTE2/TPM1CH0
PTE3/TPM1CH1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
80-Pin
LQFP
60 PTG3/KBI1P3
59 PTD3/KBI1P6/AD1P11
58 PTD2/KBI1P5/AD1P10
57 VSSAD
56 VDDAD
55 PTD1/AD1P9
54 PTD0/AD1P8
53 PTB7/AD1P7
52 PTB6/AD1P6
51 PTB5/AD1P5
50 PTB4/AD1P4
49 PTB3/AD1P3
48 PTB2/AD1P2
47 PTB1/TPM3CH1/AD1P1
46 PTB0/TPM3CH0/AD1P0
45 PTH3/TPM2CH5
44 PTH2/TPM2CH4
43 PTH1/TPM2CH3
42 PTH0/TPM2CH2
41 PTA7
Note: Pin names in bold
are lost in lower pin count
packages.
Figure 2-1. MC9S08AC128 Series in 80-Pin LQFP Package
Freescale Semiconductor
MC9S08AC128 MCU Series Data Sheet, Rev. 1
Preliminary — Subject to Change
5
5 Page 
Chapter 3
Electrical Characteristics and Timing Specifications
3.1 Introduction
This section contains electrical and timing specifications.
3.2 Parameter Classification
The electrical parameters shown in this supplement are guaranteed by various methods. To give the customer a better
understanding the following classification is used and the parameters are tagged accordingly in the tables where appropriate:
Table 3-1. Parameter Classifications
P Those parameters are guaranteed during production testing on each individual device.
C
Those parameters are achieved by the design characterization by measuring a
statistically relevant sample size across process variations.
Those parameters are achieved by design characterization on a small sample size from
T typical devices under typical conditions unless otherwise noted. All values shown in
the typical column are within this category.
D Those parameters are derived mainly from simulations.
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NOTE
The classification is shown in the column labeled “C” in the parameter tables where
appropriate.
3.3 Absolute Maximum Ratings
Absolute maximum ratings are stress ratings only, and functional operation at the maxima is not guaranteed. Stress beyond the
limits specified in Table 3-2 may affect device reliability or cause permanent damage to the device. For functional operating
conditions, refer to the remaining tables in this section.
This device contains circuitry protecting against damage due to high static voltage or electrical fields; however, it is advised that
normal precautions be taken to avoid application of any voltages higher than maximum-rated voltages to this high-impedance
circuit. Reliability of operation is enhanced if unused inputs are tied to an appropriate logic voltage level (for instance, either
VSS or VDD).
Freescale Semiconductor
MC9S08AC128 Series Data Sheet, Rev. 1
Preliminary — Subject to Change
11
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