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PDF AMIS-30532 Data sheet ( Hoja de datos )
| Número de pieza | AMIS-30532 | |
| Descripción | Micro-Stepping Motor Driver | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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AMIS-30532
Micro-Stepping Motor
Driver
Introduction
The AMIS−30532 is a micro−stepping stepper motor driver for
bipolar stepper motors. The chip is connected through I/O pins and an
SPI interface with an external microcontroller. It has an on−chip
voltage regulator, reset−output and watchdog reset, able to supply
peripheral devices. The AMIS−30532 contains a current−translation
table and takes the next micro−step depending on the clock signal on
the “NXT” input pin and the status of the “DIR” (=direction) register
or input pin. The chip provides a so−called “speed and load angle”
output. This allows the creation of stall detection algorithms and
control loops based on load−angle to adjust torque and speed. It is
using a proprietary PWM algorithm for reliable current control.
The AMIS−30532 is implemented in I2T100 technology, enabling
both high−voltage analog circuitry and digital functionality on the
same chip. The chip is fully compatible with the automotive voltage
requirements.
The AMIS−30532 is ideally suited for general−purpose stepper
motor applications in the automotive, industrial, medical, and marine
environment. With the on−chip voltage regulator it further reduces the
BOM for mechatronic stepper applications.
Key Features
• Dual H−Bridge for 2−Phase Stepper Motors
• Programmable Peak−Current up to 1.6 A Continuous† (3.0 A Short
Time) using a 5−bit Current DAC
• On−Chip Current Translator
• SPI Interface
• Speed and Load Angle Output
• Seven Step Modes from Full−Step Up to 32 Micro−Steps
• Fully Integrated Current−Sense
• PWM Current Control with Automatic Selection of Fast and Slow
Decay
• Low EMC PWM with Selectable Voltage Slopes
• Active Fly−Back Diodes
• Full Output Protection and Diagnosis
• Thermal Warning and Shutdown
• Compatible with 5 V and 3.3 V Microcontrollers
• Integrated 5 V Regulator to Supply External Microcontroller
• Integrated Reset Function to Reset External Microcontroller
• Integrated Watchdog Function
• These Devices are Pb−Free and are RoHS Compliant*
www.onsemi.com
NQFP−32, 7x7
CASE 560AA
MARKING DIAGRAM
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
G = Pb−Free Designator
CCCCC = Country of Assembly
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 27 of this data sheet.
†Output current level may be limited by ambient temperature and heat sinking.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2015
March, 2015 − Rev. 2
1
Publication Order Number:
AMIS−30532/D
1 page  
AMIS−30532
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Figure 4. Example of NQFP-32 PCB Ground Plane Layout in Top View (Preferred Layout at Top and Bottom)
ELECTRICAL SPECIFICATION
Recommend Operation Conditions
Operating ranges define the limits for functional
operation and parametric characteristics of the device. Note
that the functionality of the chip outside these operating
Table 4. OPERATING RANGES
Symbol
Parameter
VBB Analog DC Supply
TJ Junction Temperature (Note 5)
5. No more than 100 cumulative hours in life time above Ttw.
ranges is not guaranteed. Operating outside the
recommended operating ranges for extended periods of time
may affect device reliability.
Min Max Unit
+6 +30 V
−40
+172
°C
www.onsemi.com
5
5 Page 
AMIS−30532
FUNCTIONAL DESCRIPTION
H−Bridge Drivers
A full H−bridge is integrated for each of the two stator
windings. Each H−bridge consists of two low−side and two
high−side N−type MOSFET switches. Writing logic ‘0’ in
bit <MOTEN> disables all drivers (high−impedance).
Writing logic ‘1’ in this bit enables both bridges and current
can flow in the motor stator windings.
In order to avoid large currents through the H−bridge
switches, it is guaranteed that the top− and bottom−switches
of the same half−bridge are never conductive
simultaneously (interlock delay).
A two−stage protection against shorts on motor lines is
implemented. In a first stage, the current in the driver is
limited. Secondly, when excessive voltage is sensed across
the transistor, the transistor is switched−off.
In order to reduce the radiated/conducted emission,
voltage slope control is implemented in the output switches.
The output slope is defined by the gate−drain capacitance of
output transistor and the (limited) current that drives the
gate. There are two trimming bits for slope control (see SPI
Control Parameter Overview EMC[1:0]).
The power transistors are equipped with so−called “active
diodes”: when a current is forced trough the transistor switch
in the reverse direction, i.e. from source to drain, then the
transistor is switched on. This ensures that most of the
current flows through the channel of the transistor instead of
through the inherent parasitic drain−bulk diode of the
transistor.
Depending on the desired current range and the
micro−step position at hand, the RDS(on) of the low−side
transistors will be adapted such that excellent current−sense
accuracy is maintained. The RDS(on) of the high−side
transistors remain unchanged, see Table 5 DC Parameters
for more details.
PWM Current Control
A PWM comparator compares continuously the actual
winding current with the requested current and feeds back
the information to a digital regulation loop. This loop then
generates a PWM signal, which turns on/off the H−bridge
switches. The switching points of the PWM duty−cycle are
synchronized to the on−chip PWM clock. The frequency of
the PWM controller can be doubled and an artificial jitter
can be added (see SPI Control Parameter Overview PWMJ).
The PWM frequency will not vary with changes in the
supply voltage. Also variations in motor−speed or
load−conditions of the motor have no effect. There are no
external components required to adjust the PWM frequency.
Automatic Forward and Slow−Fast Decay
The PWM generation is in steady−state using a
combination of forward and slow−decay. The absence of
fast−decay in this mode, guarantees the lowest possible
current−ripple “by design”. For transients to lower current
levels, fast−decay is automatically activated to allow
high−speed response. The selection of fast or slow decay is
completely transparent for the user and no additional
parameters are required for operation.
Icoil
Set value
0
TPWM
Actual value
t
Forward & Slow Decay
Fast Decay & Forward
Forward & Slow Decay
Figure 8. Forward and Slow/Fast Decay PWM
www.onsemi.com
11
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