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PDF MAX9317A Data sheet ( Hoja de datos )
| Número de pieza | MAX9317A | |
| Descripción | Dual 1:5 Differential Clock Drivers with LVPECL Inputs and LVDS Outputs | |
| Fabricantes | Maxim Integrated Products | |
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19-2543; Rev 0; 7/02
Dual 1:5 Differential Clock Drivers with LVPECL
Inputs and LVDS Outputs
General Description
The MAX9317/MAX9317A/MAX9317B/MAX9317C low-
skew, dual 1-to-5 differential drivers are designed for
clock and data distribution. The differential input is
reproduced at five LVDS outputs with a low output-to-
output skew of 5ps.
The MAX9317/MAX9317A are designed for low-voltage
operation from a 2.375V to 2.625V power supply for use
in 2.5V systems. The MAX9317B/MAX9317C operate
from a 3.0V to 3.6V power supply for use in 3.3V sys-
tems. The MAX9317A/MAX9317C feature 50Ω input ter-
mination resistors to reduce component count.
The MAX9317 family is available in 32-pin 7mm ✕ 7mm
TQFP and space-saving 5mm ✕ 5mm QFN packages
and operate across the extended temperature range of
-40°C to +85°C. The MAX9317A is pin compatible with
ON Semiconductor’s MC100EP210S.
Applications
Precision Clock Distribution
Low-Jitter Data Repeaters
Data and Clock Drivers and Buffers
Central-Office Backplane Clock Distribution
DSLAM Backplanes
Base Stations
ATE
Pin Configurations appear at end of data sheet.
Features
o Guaranteed 1.0GHz Operating Frequency
o 145ps (max) Part-to-Part Skew
o 5ps Output-to-Output Skew
o 330ps Propagation Delay from CLK_ to Q_
o 2.375V to 2.625V Operation (MAX9317/MAX9317A)
o 3.0V to 3.6V Operation (MAX9317B/MAX9317C)
o ESD Protection: ±2kV (Human Body Model)
o Internal 50Ω Input Termination Resistors
(MAX9317A/MAX9317C)
Ordering Information
PART
TEMP RANGE
PIN-
PACKAGE
MAX9317ETJ* -40°C to +85°C 32 Thin QFN
MAX9317ECJ -40°C to +85°C 32 TQFP
MAX9317AETJ* -40°C to +85°C 32 Thin QFN
MAX9317AECJ -40°C to +85°C 32 TQFP
MAX9317BETJ* -40°C to +85°C 32 Thin QFN
MAX9317BECJ -40°C to +85°C 32 TQFP
MAX9317CETJ* -40°C to +85°C 32 Thin QFN
MAX9317CECJ -40°C to +85°C 32 TQFP
*Future product—contact factory for availability.
NOMINAL
SUPPLY
VOLTAGE
(V)
2.5
2.5
2.5
2.5
3.3
3.3
3.3
3.3
Functional Diagram
9, 16
VCC 25, 32
VTA 2
RIN
50Ω
CLKA
CLKA
CLKB
CLKB
3
4
6
7
RIN
50Ω
VTB 5
GND 1, 8
RIN
50Ω
RIN
50Ω
MAX9317A/MAX9317C ONLY.
MAX9317
MAX9317A
MAX9317B
MAX9317C
24 QA3
23 QA3
22 QA4
21 QA4
20 QB0
19 QB0
18 QB1
17 QB1
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1 page  
Dual 1:5 Differential Clock Drivers with LVPECL
Inputs and LVDS Outputs
PIN
1, 8
2
3
4
5
6
7
9, 16,
25, 32
10
11
12
13
14
15
17
18
19
20
21
22
23
24
26
27
28
29
30
31
—
Pin Description
NAME
MAX9317
MAX9317B
MAX9317A
MAX9317C
GND
GND
N.C.
—
—
CLKA
CLKA
N.C.
VTA
CLKA
CLKA
—
— VTB
CLKB
CLKB
CLKB
CLKB
VCC
QB4
QB4
QB3
QB3
QB2
QB2
QB1
QB1
QB0
QB0
QA4
QA4
QA3
QA3
QA2
QA2
QA1
QA1
QA0
QA0
EP
VCC
QB4
QB4
QB3
QB3
QB2
QB2
QB1
QB1
QB0
QB0
QA4
QA4
QA3
QA3
QA2
QA2
QA1
QA1
QA0
QA0
EP
FUNCTION
Ground
No Connection. Connect this pin to ground or leave floating.
CLKA Input Termination Voltage. This pin is connected to CLKA and CLKA through 50Ω
termination resistors. Connect this pin to VCC - 2V for an LVPECL input signal on CLKA or
leave floating for an LVDS input signal.
Noninverting Differential Clock Input A
Inverting Differential Clock Input A
No Connection. Connect this pin to ground or leave floating.
CLKB Input Termination Voltage. This pin is connected to CLKB and CLKB through 50Ω
termination resistors. Connect this pin to VCC - 2V for an LVPECL input signal on CLKB or
leave floating for an LVDS input signal.
Noninverting Differential Clock Input B
Inverting Differential Clock Input B
Positive Supply Voltage. Bypass each VCC pin to ground with 0.1µF and 0.01µF ceramic
capacitors. Place the capacitors as close to the device as possible with the 0.01µF
capacitor closest to the device.
CLKB Inverting Differential Output 4. Terminate with 100Ω to QB4.
CLKB Noninverting Differential Output 4. Terminate with 100Ω to QB4.
CLKB Inverting Differential Output 3. Terminate with 100Ω to QB3.
CLKB Noninverting Differential Output 3. Terminate with 100Ω to QB3.
CLKB Inverting Differential Output 2. Terminate with 100Ω to QB2.
CLKB Noninverting Differential Output 2. Terminate with 100Ω to QB2.
CLKB Inverting Differential Output 1. Terminate with 100Ω to QB1.
CLKB Noninverting Differential Output 1. Terminate with 100Ω to QB1.
CLKB Inverting Differential Output 0. Terminate with 100Ω to QB0.
CLKB Noninverting Differential Output 0. Terminate with 100Ω to QB0.
CLKA Inverting Differential Output 4. Terminate with 100Ω to QA4.
CLKA Noninverting Differential Output 4. Terminate with 100Ω to QA4.
CLKA Inverting Differential Output 3. Terminate with 100Ω to QA3.
CLKA Noninverting Differential Output 3. Terminate with 100Ω to QA3.
CLKA Inverting Differential Output 2. Terminate with 100Ω to QA2.
CLKA Noninverting Differential Output 2. Terminate with 100Ω to QA2.
CLKA Inverting Differential Output 1. Terminate with 100Ω to QA1.
CLKA Noninverting Differential Output 1. Terminate with 100Ω to QA1.
CLKA Inverting Differential Output 0. Terminate with 100Ω to QA0.
CLKA Noninverting Differential Output 0. Terminate with 100Ω to QA0.
Exposed Pad. QFN package only. Internally connected to ground.
_______________________________________________________________________________________ 5
5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet MAX9317A.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| MAX9317 | Dual 1:5 Differential Clock Drivers with LVPECL Inputs and LVDS Outputs |  Maxim Integrated |
| MAX9317A | Dual 1:5 Differential Clock Drivers with LVPECL Inputs and LVDS Outputs | Maxim Integrated Products |
| MAX9317B | Dual 1:5 Differential Clock Drivers with LVPECL Inputs and LVDS Outputs | Maxim Integrated Products |
| MAX9317C | Dual 1:5 Differential Clock Drivers with LVPECL Inputs and LVDS Outputs | Maxim Integrated Products |
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