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PDF ESDAVLC6V1-1BM2 Data sheet ( Hoja de datos )
| Número de pieza | ESDAVLC6V1-1BM2 | |
| Descripción | Single line low capacitance Transil | |
| Fabricantes | STMicroelectronics | |
| Logotipo |  |
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ESDAVLC6V1-1BM2, ESDAVLC6V1-1BT2
Single line low capacitance Transil™ for ESD protection
Features
■ Single line bi-directional protection
■ Breakdown voltage VBR = 6.1 V min.
■ Very low capacitance (6 pF typ. @ 3 V)
■ Lead-free package
Benefits
■ Very low capacitance for optimized data
integrity
■ Very low reverse current < 0.1 µA
■ Low PCB space consumption: 0.6 mm2 max
■ High reliability offered by monolithic integration
Complies with the following standards:
■ IEC 61000-4-2 level 4
– 15 kV (air discharge)
– 8 kV (contact discharge)
■ MIL STD 883G - Method 3015-7: class 3 B
– Human body model
Applications
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Where transient overvoltage protection in ESD
sensitive equipment is required, such as:
■ Computers
■ Printers
■ Communication systems
■ Cellular phone handsets and accessories
■ Video equipment
SOD882
SOD882T
Figure 1. Functional diagram
I/O1
I/O2
Description
The ESDAVLC6V1-1BM2 and
ESDAVLC6V1-1BT2 are monolithic application
specific devices dedicated to ESD protection of
high speed serial interfaces such as USB 2.0,
display and camera interface.
The devices are ideal for applications where both
printed circuit board space and power absorption
capability are required.
TM: Transil is a trademark of STMicroelectronics
April 2008
Rev 1
1/13
www.st.com
1 page  
ESDAVLC6V1-1BM2, ESDAVLC6V1-1BT2
Characteristics
Figure 14. ESD response to IEC 61000-4-2
(+2 kV contact discharge)
Figure 15. ESD response to IEC 61000-4-2
(-2 kV contact discharge)
Figure 16. ESD response to IEC 61000-4-2
(+8 kV contact discharge)
Figure 17. ESD response to IEC 61000-4-2
(-8 kV contact discharge)
Figure 18. ESD response to IEC 61000-4-2
(+15 kV contact discharge)
Figure 19. ESD response to IEC 61000-4-2
(-15kV contact discharge)
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5 Page 
ESDAVLC6V1-1BM2, ESDAVLC6V1-1BT2
Recommendation on PCB assembly
4.3 Placement
1. Manual positioning is not recommended.
2. It is recommended to use the lead recognition capabilities of the placement system, not
the outline centering
3. Standard tolerance of ± 0.05 mm is recommended.
4. 3.5 N placement force is recommended. Too much placement force can lead to
squeezed out solder paste and cause solder joints to short. Too low placement force
can lead to insufficient contact between package and solder paste that could cause
open solder joints or badly centered packages.
5. To improve the package placement accuracy, a bottom side optical control should be
performed with a high resolution tool.
6. For assembly, a perfect supporting of the PCB (all the more on flexible PCB) is
recommended during solder paste printing, pick and place and reflow soldering by
using optimized tools.
4.4 PCB design preference
1. To control the solder paste amount, the closed via is recommended instead of open
vias.
2. The position of tracks and open vias in the solder area should be well balanced. The
symmetrical layout is recommended, in case any tilt phenomena caused by
asymmetrical solder paste amount due to the solder flow away.
4.5 Reflow profile
Figure 28. ST ECOPACK® recommended soldering reflow profile for PCB mounting
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Temperature (°C)
260°C max
255°C
220°C
180°C
125 °C
3°C/s max
3°C/s max
2°C/s62r°°eCCc//ossm6mr°emCacx/eosnmmdmeadxended
0
01234567
10-30 sec
Time (min)
90 to 150 sec
90 sec max
Note:
Minimize air convection currents in the reflow oven to avoid component movement.
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| Páginas | Total 13 Páginas | |
| PDF Descargar | [ Datasheet ESDAVLC6V1-1BM2.PDF ] | |
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