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PDF LTC3785-1 Data sheet ( Hoja de datos )
| Número de pieza | LTC3785-1 | |
| Descripción | Buck-Boost Controller | |
| Fabricantes | Linear Technology | |
| Logotipo |  |
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FEATURES
n Single Inductor Architecture Allows VIN Above,
Below or Equal to VOUT
n Power Good Output Indicator
n 2.7V to 10V Input and Output Range
n Up to 96% Efficiency
n Up to 10A of Output Current
n All N-Channel MOSFETs, No RSENSETM
n True Output Disconnect During Shutdown
n Programmable Current Limit and Soft-Start
n Optional Short-Circuit Shutdown Timer
n Output Overvoltage and Undervoltage Protection
n Programmable Frequency: 100kHz to 1MHz
n Selectable Burst Mode® Operation
n Available in 24-Lead (4mm × 4mm) Exposed Pad
QFN Package
APPLICATIONS
n Palmtop Computers
n Handheld Instruments
n Wireless Modems
n Cellular Telephones
LTC3785-1
10V, High Efficiency,
Buck-Boost Controller
with Power Good
DESCRIPTION
The LTC®3785-1 is a high power synchronous buck-boost
controller that drives all N-channel power MOSFETs from
input voltages above, below and equal to the output volt-
age. With an input range of 2.7V to 10V, the LTC3785-1 is
well suited for a wide variety of single or dual cell Li-Ion
or multi-cell alkaline/NiMH applications.
The operating frequency can be programmed from 100kHz
to 1MHz. The soft-start time and current limit are also
programmable. The soft-start capacitor doubles as the
fault timer which can program the IC to latch off or recycle
after a determined off time. Burst Mode operation is user
controlled and can be enabled by driving the MODE pin
high. The LTC3785-1 includes a Power Good output that
indicates when the output voltage is within 7.5% of its
designed setpoint.
Protection features include foldback current limit,
short-circuit and overvoltage protection.
, LT, LTC, LTM and Burst Mode are registered trademarks of Linear Technology
Corporation. No RSENSE is a trademark of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
www.DataSheet4U.com
TYPICAL APPLICATION
270pF
VOUT
1.3k 215k
215k
127k
VIN
VSENSE
VCC
ISVIN
TG1
VBST1
127k
1nF
FB SW1
ISSW1
12k VDRV
BG1
LTC3785-1
VC
49.9k
RT
MODE
ISVOUT
TG2
2.2nF
42.2k
PGOOD
VBST2
RUN/SS
ILSET
SW2
ISSW2
CCM BG2
GND
4.7μF
VIN
2.7V
TO 10V
0.22μF
A
22μF
B
D
0.22μF
4.7μH
VOUT
3.3V
5A
100μF
C
37851 TA01a
Efficiency vs Input Voltage
100
VOUT = 3.3V
FOSC = 500kHz
95
ILOAD = 2A
ILOAD = 1A
90
85
2.5 4 5.5 7 8.5 10
VIN (V)
37851 TA01b
37851f
1
1 page  
TYPICAL PERFORMANCE CHARACTERISTICS
VIN Start-Up Voltage vs
Temperature
2.490
2.485
2.480
2.475
2.470
2.465
–50 –25 0
25 50
TEMPERATURE (°C)
75 100
37851 G10
VIN Burst Quiescent Current vs
Temperature
100
95
90
85
80
–50
–25 0 25 50
TEMPERATURE (°C)
75 100
37851 G11
LTC3785-1
OV and UV Thresholds vs
Temperature
8
6 OV THRESHOLD
4
2
0
–2
–4
–6 UV THRESHOLD
–8
–50
–25 0 25 50
TEMPERATURE (°C)
75 100
37851 G12
PIN FUNCTIONS
RUN/SS (Pin 1): Run Control and Soft-Start Input. An
internal 1μA charges the soft-start capacitor and will
charge to approximately 2.5V. During a current limit fault,
the soft-start capacitor will incrementally discharge. Once
the pin drops below 1.225V the IC will enter fault mode,
turning off the outputs for 32 times the soft-start time. If
>5μA (at RUN/SS = 1.225V) is applied externally, the part
wwww.DialltalaSthcehet4oUff.caofmter a fault is detected. If >40μA (at RUN/SS
= 1.225V) is applied externally, current limit faults will not
discharge the SS capacitor.
VC (Pin 2): Error Amp Output. A frequency compensation
network is connected from this pin to the FB pin to com-
pensate the loop. See the section “Closing the Feedback
Loop” for guidelines.
FB (Pin 3): Feedback Pin. Connect resistor divider tap
here. The feedback reference voltage is typically 1.225V
The output voltage can be adjusted from 2.7V to 10V ac-
cording to the following formula:
VOUT
=
1.225V
•
R1+ R2
R2
VSENSE (Pin 4): Overvoltage and Undervoltage Sense.
The overvoltage threshold is internally set 7.5% above
the regulated FB voltage and the undervoltage threshold
is internally set 7.5% below the FB regulated voltage. This
pin can be tied to FB but to optimize the response time it
is recommended that a separate voltage divider from VOUT
be applied. The divider can be skewed from the feedback
value to achieve the desired UV or OV threshold.
ILSET (Pin 5): Current Limit Set. A resistor from this pin
to ground sets the current limit threshold from the ISVIN
and ISSW1 pins.
CCM (Pin 6): Continuous Conduction Mode Control Pin.
When set low, the inductor current is allowed to go slightly
negative (–15mV referenced to the ISVOUT – ISSW2 pins).
When driven high, the reverse current limit is set to the similar
value of the forward current limit set by the ILSET pin.
RT (Pin 7): Oscillator Programming Pin. A resistor from
this pin to GND sets the free-running frequency of the IC.
fOSC ≅ 2.5e10/RT.
37851f
5
5 Page 
LTC3785-1
OPERATION
of the voltage loop, resulting in a lower output voltage
to regulate the input current. This fault condition causes
the RUN/SS capacitor to begin discharging. The level of
the discharge current depends on how much the current
exceeds the programmed threshold. Figure 3 is a simpli-
fied diagram of the current sense and fault circuitry. If the
current limit fault duration is long enough to discharge the
RUN/SS capacitor below 1.225V, the fault latch is set and
will cycle the RUN/SS capacitor 16 times (1μA charging
and 1μA discharging of the RUN/SS capacitor) to create an
off time of 32 times the soft-start time before the outputs
are allowed to switch to restart the output voltage. If the
current limit fault level exceeds 150% of the programmed
ILIMIT level at any time, the IMAX comparator is tripped and
output switches B and D are turned on to discharge the
inductor current for the remainder of the cycle.
To have the power converter latch-off on a fault, a pull-up
current between 4μA and 7μA on the RUN/SS pin will allow
the RUN/SS capacitor to discharge during an extended
fault, but will prevent cycling of the fault which will cause the
converter to stay off. One method to implement this is by
placing a diode (anode tied to VOUT) and a resistor from VOUT
to the RUN/SS pin. The current sourced into RUN/SS will be
VOUT – 0.7 divided by the resistor value. To ignore all faults
source greater than 40μA into the RUN/SS pin (At 1.225V on
the RUN/SS pin). Since the maximum fault current is limited,
this will prevent any discharging of the RUN/SS capacitor,
the soft-start capacitor will need to be sized accordingly to
accommodate the extra charging current at start-up.
During an output short-circuit or if VOUT is less than 1.8V, the
current limit folds back to 50% of the programmed level.
REVERSE CURRENT LIMIT
The LTC3785-1 can be programmed to provide full class
D operation or allowed to source and sink current equal to
the current limit set value. This is achieved by asserting a
high level on the CCM pin. To minimize the reverse output
current, the CCM pin should be driven low or strapped to
ground. During this mode only, –15mV typical is allowed
across output switch D and is sensed with the ISVOUT and
ISSW2 pins.
THERMAL SD
1.225V
www.DataSheet4U.com
0.7V
+
–
–
+
S FAULT
S LOGIC
RUN
ILIMIT COMP
gm = 1/20k
+
gm–
V = 60k/RILSET
(15k/RILSET WHEN VOUT < 1.8V)
ISVIN
22
TG1 20
RUN/SS
1
CSS
VOUT
4
R1
FB
3
CP1
VC
2
R2
ILSET
5
RILSET
1μA
2.2V
2μA
1/3 • ILIM(OUT)
10μA MAX
ILIM(OUT)
30μA MAX
1.225V
+ ERROR AMP
–
ILIMIT
SET
ILIM COMP
IMAX COMP
IMAX COMP
TURN
SWITCHES
B AND D ON
+
–
V = 90k/RILSET
SW1 19
+
X10
–
ISSW1
SAMPLED
18
BG1 17
CCM = HIGH = 6k/RILSET
CCM = LOW = 15mV
CCM
6
SWITCH D
OFF
REVERSE
CURRENT LIMIT
–+
ISVOUT
10
TG2 12
SW2 13
SAMPLED ISSW2 14
BG2 15
Figure 3. Block Diagram of Current Limit Fault Circuitry
VIN
A
B
L1
VOUT
D COUT
C
37851 F03
37851f
11
11 Page | ||
| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet LTC3785-1.PDF ] | |
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