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PDF ISL8204M Data sheet ( Hoja de datos )
| Número de pieza | ISL8204M | |
| Descripción | Complete High Efficiency DC/DC Power Module | |
| Fabricantes | Intersil Corporation | |
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DATASHEET
Complete High Efficiency DC/DC Power Module
ISL8204M, ISL8206M
The ISL8204M, ISL8206M is a family of pin-compatible power
modules to the ISL8201M. These are simple and easy to use,
high power DC/DC modules and are ideal for a wide variety of
applications. The ISL820xM family of high current DC/DC
step-down modules virtually eliminate design and manufacturing
risks while dramatically improving time to market.
The simplicity is in the family's "Off The Shelf" unassisted
implementation. All you need is the ISL820xM for the current
requirement of your design, bulk input and output capacitors and
one resistor, to program the output voltage, and you have a
complete high current power design ready for your market.
This family of buck converters is packaged in a thermally
enhanced compact (15mmx15mm) overmolded QFN Package
that operates without a heatsink, even at full load over
temperature. The package supports simple, reliable, automated
assembly using standard surface mount equipment while
making it easy to probe to all pins. The lack of a required heat
dissipation layer, provides easy access to all pins and the limited
number of the external components reduce the PCB to a
component layer and a simple ground layer.
Additionally, each IC in the family is footprint compatible, making
it easy to change your design to meet different power needs
without changing your layout. One simple layout fits all.
Features
• Complete switch mode power supply in one package
- ISL8204M - 4A with, 6.6A Peak
- ISL8206M - 6A with, 8.8A Peak
• Single resistor sets VOUT +0.6V up to +6V at ±1%
• Up to 95% efficiency
• Overcurrent protection
• Internal soft-start with pre-bias output start-up
• Wide input voltage range from 1VDC to 20VDC
• Fast transient response
Applications
• Servers
• Telecom and datacom applications
• Industrial equipment
• Point of load regulation
• General purpose step-down DC/DC
Related Literature
• AN1386 “ISL8201M, ISL8204M, ISL8206M EVAL1Z
Evaluation Board User’s Guide”
• iSim model - (See respective device information page at
www.intersil.com)
VIN
(1V to 20V)
220µF
PVCC
CPVCC
10µF
PVCC
VIN VOUT
ISL8204M/6M
Power Module FB
PGND
VOUT
(0.6V to 6.0V)
330µF
RFB
(Sets VOUT)
FIGURE 1. TYPICAL SCHEMATIC
7
6
5 3.3V
4 1.5V
0.6V
3
2
1
0
60 70 80 90 100
AMBIENT TEMPERATURE (°C)
FIGURE 2. DERATING CURVE (ISL8206M 5VIN)
110
TABLE 1. RFB VALUES FOR TYPICAL OUTPUT VOLTAGES
VOUT
0.6V
1.05V
1.2V 1.5V 1.8V 2.5V 3.3V
5V
RFB
Open
13k
9.76k
6.49k
4.87k
3.09k
2.16k
1.33k
October 28, 2014
FN6999.4
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 |Copyright Intersil Americas LCC. 2009, 2010, 2012, 2014. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
1 page  
ISL8204M, ISL8206M
Absolute Maximum Ratings
COMP/EN to PGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PGND - 0.3V to +6V
ISET to PGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PGND - 0.3V to PVCC + 0.3V
PVCC to PGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PGND - 0.3V to +15V
PHASE to PGND (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -1.2V ~ +30V
VIN to PHASE (Note 4). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -1.2V ~ +30V
Junction Temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +125°C
Storage Temperature Range, TSTG . . . . . . . . . . . . . . . . . . -55°C to +125°C
ESD Rating
Human Body Model (Tested per JESD22-A114E) . . . . . . . . . . . . . . . . 2kV
Machine Model (Tested per JESD22-A115-A) . . . . . . . . . . . . . . . . . 100V
Charge Device Model (Tested per JESD22-C101C). . . . . . . . . . . . . . . 1kV
Latch Up (Tested per JESD-78B; Class 2, Level A) . . . . . . . . . . . . . . 100mA
Thermal Information
Thermal Resistance (Typical)
JA (°C/W) JC (°C/W)
15 Ld QFN (Notes 5, 6) . . . . . . . . . . . . . . . . 13.0
2.0
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see TB493
Recommended Operating Ratings
Input Supply Voltage (VIN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +1V to +20V
Output Voltage (VOUT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.6V to +6V
PVCC
Fixed Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5V or +12V
Wide Range Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +6.5V to +14.4V
Ambient Temperature Range (TA) . . . . . . . . . . . . . . . . . . . -40°C to +85°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
4. VDS (Drain to Source) specification for internal high-side and low-side MOSFET.
5. JA is measured in free air with the component mounted on a high effective thermal conductivity test board (i.e. 4-layer type without thermal vias
– see tech brief TB379) per JEDEC standards except that the top and bottom layers assume solid planes.
6. For JC, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications TA = +25°C. VIN = 12V, VOUT = 1.5V. CIN = 220µFx1, 10µF/Ceramicx2, COUT = 47µFx8/Ceramic. Boldface limits
apply over the operating temperature range, -40°C to +85°C.
PARAMETER
SYMBOL
CONDITIONS
MIN MAX
(Note 8) TYP (Note 8) UNITS
INPUT CHARACTERISTICS
Input Supply Bias Current
Input In-rush Current
Input Supply Current
OUTPUT CHARACTERISTICS
IQ(VIN)
IinRush
IS(VIN)
IOUT = 0A, VOUT = 1.5V, VIN = 12V, PVCC = 12V
IOUT = 0A, VOUT = 1.5V, VIN = 12V, PVCC = 12V
IOUT = 6A, VOUT = 1.5V, VIN = 12V, PVCC = 12V
IOUT = 4A, VOUT = 1.5V, VIN = 12V, PVCC = 12V
-
-
-
-
13
140
0.86
0.56
-
-
-
-
mA
mA
A
A
Output Continuous Current Range
IOUT(DC)
VIN = 12V, VOUT = 1.5V
ISL8206M
0-
6A
ISL8204M
0 -4 A
Line Regulation Accuracy
Load Regulation Accuracy
Peak-to-Peak Output Ripple Voltage
VOUT/VIN
VOUT/IOUT
VOUT
VOUT = 1.5V, IOUT = 0A, VIN = 3.3V to 20V,
PVCC = 5V
IOUT = 0A to 6A/4A, VOUT = 1.5V, VIN = 12V,
PVCC = 12V
ISL8206M
IOUT = 6A VOUT = 1.5V, VIN = 12V,
PVCC = 12V
ISL8204M
- 0.1 -
- 0.5 -
-8
-
%
%
mV
- 7 - mV
DYNAMIC CHARACTERISTICS
IOUT = 4A VOUT = 1.5V, VIN = 12V,
PVCC = 12V
Voltage Change For Positive Load Step
Voltage Change For Negative Load Step
VOUT-DP IOUT = 0A to 4A. Current slew rate = 2.5A/µs,
-
30
-
VIN = 12V, VOUT = 1.5V, PVCC = 12V
VOUT-DN IOUT = 0A to 4A. Current slew rate = 2.5A/µs,
-
27
-
VIN = 12V, VOUT = 1.5V, PVCC = 12V
mV
mV
Submit Document Feedback
5
FN6999.4
October 28, 2014
5 Page 
ISL8204M, ISL8206M
The ramp is created digitally, so there will be 64 small discrete
steps. There is no simple way to change this ramp rate externally.
After an initialization period (t3 to t4), the error amplifier (COMP/EN
pin) is enabled and begins to regulate the converter's output voltage
during soft-start. The oscillator's triangular waveform is compared to
the ramping error amplifier voltage. This generates PHASE pulses of
increasing width that charge the output capacitors. When the
internally generated soft-start voltage exceeds the reference voltage
(0.6V), the soft-start is complete and the output should be in
regulation at the expected voltage. This method provides a rapid and
controlled output voltage rise; there is no large in-rush current
charging the output capacitors. The entire start-up sequence from
POR typically takes up to 17ms; up to 10.2ms for the delay and OCP
sample and 6.8ms for the soft-start ramp.
Figure 20 shows the normal curve for start-up; initialization
begins at t0, and the output ramps between t1 and t2. If the
output is pre-biased to a voltage less than the expected value (as
shown Figure 21), neither internal MOSFET will turn on until the
soft-start ramp voltage exceeds the output; VOUT starts
seamlessly ramping from there.
VOUT
FIGURE 21. PRE-BIASED START-UP
VOUT
T2
VOUT
T0 T1
FIGURE 20. NORMAL START-UP
If the output is pre-biased to a voltage above the expected value
(as shown Figure 22), neither MOSFET will turn on until the end of
the soft-start, at which time it will pull the output voltage down to
the final value. Any resistive load connected to the output will help
pull down the voltage (at the RC rate of the R of the load and the C
of the output capacitance).
500mV/DIV
FIGURE 22. PRE-BIASED START-UP - OVERCHARGED
If VIN for the synchronous buck converter is from a different
supply that comes up after PVCC, the soft-start will go through its
cycle, but with no output voltage ramp. When VIN turns on, the
output will follow the ramp of the VIN from zero up to the final
expected voltage (at close to 100% duty cycle, with COMP/EN pin
>4V). If VIN is too fast, there may be excessive in-rush current
charging the output capacitors (only the beginning of the ramp,
from zero to VOUT matters here). If this is not acceptable, then
consider changing the sequencing of the power supplies, sharing
the same supply, or adding sequencing logic to the COMP/EN pin
to delay the soft-start until the VIN supply is ready (see “Input
Voltage Considerations” on page 13).
If ISL8204M, ISL8206M is disabled after soft-start (by pulling
COMP/EN pin low), and afterwards enabled (by releasing the
COMP/EN pin), then the full initialization (including OCP sample)
will take place. However, there is no new OCP sampling during
Submit Document Feedback 11
FN6999.4
October 28, 2014
11 Page | ||
| Páginas | Total 19 Páginas | |
| PDF Descargar | [ Datasheet ISL8204M.PDF ] | |
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