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PDF TMP91CY28 Data sheet ( Hoja de datos )
| Número de pieza | TMP91CY28 | |
| Descripción | Original CMOS 16-Bit Microcontroller | |
| Fabricantes | Toshiba Semiconductor | |
| Logotipo |  |
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TOSHIBA Original CMOS 16-Bit Microcontroller
TLCS-900/L1 Series
TMP91CY28
www.DataSheet4U.com
Semiconductor Company
1 page  
TMP91CY28
(P60) SCK0
(P61) SO0/SDA0
(P62) SI0/SCL0
(P63) INT0
(P64) SCOUT
(P65)
(P66)
(P70) TA0IN
(P71) TA1OUT
(P72) TA3OUT
(P73)
(P74)
(P75)
(P80) TB0IN0/INT5
(P81) TB0IN1/INT6
(P82) TB0OUT0
(P83) TB0OUT1
(P84) TB1IN0/INT7
(P85) TB1IN1/INT8
(P86) TB1OUT0
(P87) TB1OUT1
(P90) SCK1
(P91) SO1/SDA1
(P92) SI1/SCL1
(P93) TXD
(P94) RXD
(P95) SCLK/CTS
(P96)
(PA0) INT1
(PA1) INT2
(PA2) INT3
(PA3) INT4
www.DataSheet4U.com (PA4)
(PA5)
(PA6)
(PA7)
NMI
WAKE
DVCC [3]
DVSS [3]
I2C/SIO
(Channel 0)
Port 6
8-bit timer
(TMRA0)
8-bit timer
(TMRA1)
Port 7
8-bit timer
(TMRA2)
8-bit timer
(TMRA3)
CPU (TLCS-900/L1)
XWA
XBC
XDE
WA
BC
DE
XHL H L
XIX IX
XIY IY
XIZ IZ
XSP SP
32 bits
SR F
PC
High-frequency
oscillator
Clock gear
Port 0
Watchdog timer
(WDT)
BCD calculator
(BCDC)
16-bit timer
(TMRB0)
Port 8
16-bit timer
(TMRB1)
I2C/SIO
(Channel 1)
Port 9
SIO/UART
8-Kbyte RAM
Program patch
logic
6 banks
Port 1
256-Kbyte ROM
Port 2
Interrupt
controller
Port A
Standby
controller
(KWI)
Port 3
CS/WAIT
controller
Port 4
10-bit
8-channel
AD converter
Port 5
( ): Beginning state after reset
Figure 1.1 TMP91CY28 Block Diagram
X1
X2
EMU0
EMU1
RESET
AM0
AM1
ALE
AD0 (P00)
AD1 (P01)
AD2 (P02)
AD3 (P03)
AD4 (P04)
AD5 (P05)
AD6 (P06)
AD7 (P07)
AD8/A8 (P10)
AD9/A9 (P11)
AD10/A10 (P12)
AD11/A11 (P13)
AD12/A12 (P14)
AD13/A13 (P15)
AD14/A14 (P16)
AD15/A15 (P17)
A0/A16 (P20)
A1/A17 (P21)
A2/A18 (P22)
A3/A19 (P23)
A4/A20 (P24)
A5/A21 (P25)
A6/A22 (P26)
A7/A23 (P27)
RD (P30)
WR (P31)
HWR (P32)
WAIT (P33)
BUSRQ (P34)
BUSAK (P35)
R/W (P36)
(P37)
CS0 (P40)
CS1 (P41)
CS2 (P42)
CS3 (P43)
AN0/KWI0 (P50)
AN1/KWI1 (P51)
AN2/KWI2 (P52)
AN3/ADTRG/KWI3 (P53)
AN4/KWI4 (P54)
AN5/KWI5 (P55)
AN6/KWI6 (P56)
AN7/KWI7 (P57)
AVCC
AVSS
VREFL
VREFH
91CY28-3
2004-02-10
5 Page 
TMP91CY28
3. Functional Description
This device is a version of expanding its internal mask ROM size to 256 Kbytes. The configuration
and the functionality of this device are the same as those of the TMP91CW28. For the functions of
this device that are not described here, refer to the TMP91CW28 data sheet.
3.1 Memory Map
Figure 3.1.1 shows a memory map of the device in single-chip mode and its memory areas that
can be accessed in each addressing mode of the CPU.
000000H
000100H
001000H
003000H
010000H
Internal I/O
(4 Kbytes)
Direct area (n)
Internal RAM
(8 Kbytes)
External memory
64-Kbyte area
(nn)
www.DataSheet4U.com
FC0000H
16-Mbyte area
(R)
(−R)
(R+)
(R + R8/16)
(R + d8/16)
(nnn)
256 Kbytes
internal ROM
FFFF00H
FFFFFFH
Vector table (256 bytes)
( = Internal area)
Figure 3.1.1 TMP91CY28 Memory Map (Single chip mode)
91CY28-9
2004-02-10
11 Page | ||
| Páginas | Total 22 Páginas | |
| PDF Descargar | [ Datasheet TMP91CY28.PDF ] | |
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