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PDF CY7C199C Data sheet ( Hoja de datos )
| Número de pieza | CY7C199C | |
| Descripción | 32K x 8 Static RAM | |
| Fabricantes | Cypress Semiconductor | |
| Logotipo |  |
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Features
• Fast access time: 12 ns, 15 ns, 20 ns, and 25 ns
• Wide voltage range: 5.0V ± 10% (4.5V to 5.5V)
• CMOS for optimum speed/power
• TTL–compatible Inputs and Outputs
• Available in 28 DIP, 28 SOJ, and 28 TSOP I.
• 2.0V Data Retention
• Low CMOS standby power
• Automated Power–down when deselected
CY7C199C
32K x 8 Static RAM
General Description1
The CY7C199C is a high–performance CMOS Asynchronous
SRAM organized as 32K by 8 bits that supports an
asynchronous memory interface. The device features an
automatic power–down feature that significantly reduces
power consumption when deselected.
See the Truth Table in this datasheet for a complete
description of read and write modes.
The CY7C199C is available in 28 DIP, 28 SOJ, and 28 TSOP
I package(s).
Logic Block Diagram
Input Buffer
RAM Array
I/Ox
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Column Decoder
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Maximum Access Time
Maximum Operating Current
Maximum CMOS Standby Current
(low power)
12 ns
12
85
500
Power
Down
Circuit
X
CE
WE
OE
A
X
15 ns
15
80
500
20 ns
20
75
500
25 ns
25
75
500
Unit
ns
mA
uA
Notes:
1. For best–practices recommendations, please refer to the Cypress application note System Design Guidelines on www.cypress.com.
Cypress Semiconductor Corporation • 3901 North First Street • San Jose, CA 95134 • 408-943-2600
Document #: 38-05408 Rev. *A
Revised September 11, 2003
1 page  
CY7C199C
Parameter
Description
ICC VCC Operating
Supply Current
ISB1 Automatic CE
Power–down
Current TTL Inputs
ISB2 Automatic CE
Power–down
Current CMOS
Inputs
IOZ Output Leakage
Current
IIX Input Load Current
Capacitance4
Condition
VCC = Max., IOUT = 0 mA, f = FMAX =
1/tRC
Max. VCC, CE ≥ VIH, VIN ≥ VIH or VIN
≤ VIL, f = FMAX
Max. VCC, CE ≥ VCC – 0.3V, VIN ≥
VCC – 0.3V, or VIN ≤ 0.3V, f = 0
GND ≤ Vi ≤ VCC, Output Disabled
GND ≤ Vi ≤ VCC
Power
–
–
L
–
L
–
–
20 ns
Min Max
– 75
25 ns
Min Max
– 75
Unit
mA
– 30 – 30 mA
– 10 – 10 mA
– 10 – 10 mA
– 500 – 500 uA
–5 +5 –5 +5
–5 +5 –5 +5
uA
uA
Parameter
CIN
COUT
Description
Input Capacitance
Output Capacitance
Conditions
TA = 25C, f = 1 MHz,
VCC = 5.0V
AC Test Loads
Max
ALL – PACKAGES
8
8
Unit
pF
Output Loads
R1
VCC
Output Loads
for tHZOE, tHZCE & tHZWE
R3
VCC
Output
C1 R2
C2 R4
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(A)* (B)*
Thevenin Equivalent
Output
Rth
VT
VCC
90%
VSS 10%
Rise Time
1 V/ns
All Input Pulses
90%
10%
Fall Time
1 V/ns
* including scope and jig capacitance
Notes:
4. Tested initially and after any design or process change that may affect these parameters.
Document #: 38-05408 Rev. *A
Page 5 of 12
5 Page 
Package Diagram (continued)
28 SOJ (8 × 18 × 3.5 mm) – V21
CY7C199C
28ÐLead(300ÐMil)Molded DIP P21
51-85031-*B
www.DataSheet4U.com
51Ð85014Ð*B
All product and company names mentioned in this document may be the trademarks of their respective holders.
Document #: 38-05408 Rev. *A
Page 11 of 12
© Cypress Semiconductor Corporation, 2003. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize
its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress
Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet CY7C199C.PDF ] | |
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