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PDF ALM-1612 Data sheet ( Hoja de datos )

Número de pieza ALM-1612
Descripción GPS LNA-Filter Front-End Module
Fabricantes Avago 
Logotipo Avago Logotipo



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ALM-1612
GPS LNA-Filter Front-End Module
Data Sheet
Description
Avago Technologies’ ALM-1612 is a GPS front-end module
that combines a low-noise amplifier (LNA) with a GPS FBAR
filter. The LNA uses Avago Technologies’ proprietary GaAs
Enhancement-mode pHEMT process to achieve high gain
with very low noise figure and high linearity. Noise figure
distribution is very tightly controlled. A CMOS-compat-
ible shutdown pin is included either for turning the LNA
on/off, or for current adjustment. The integrated filter
utilizes an Avago Technologies’ leading-edge FBAR filter
for exceptional rejection at Cell/PCS-Band frequencies.
The low noise figure and high gain, coupled with low
current consumption make it suitable for use in critical low-
power GPS applications or during low-battery situations.
Component Image
Surface Mount 3.3x2.1x1 mm3 12-lead MCOB
SD (1)
1612
Gnd (2)
RFin (3) WWYY
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Gnd (9)
RFOut (8)
Gnd (7)
Gnd (9)
RFOut (8)
Gnd (7)
SD (1)
Gnd (2)
RFin (3)
TOP VIEW
BOTTOM VIEW
Note:
Package marking provides orientation and identification
“1612” = Product Code
“YY” = Year of manufacture
“WW” = Work week of manufacture
Features
x Very Low Noise Figure: 0.95 dB typ.
x High Gain: 18.2 dB typ.
x High IIP3 and IP1dB
x Exceptional Cell/PCS-Band rejection
x Advanced GaAs E-pHEMT & FBAR Technology
x Low external component count
x Shutdown current: < 5 uA
x CMOS compatible shutdown pin (SD) current @ 2.7 V:
0.1mA
x ESD: For RFin (Pin 3): ESD Human Body Model > 3kV;
All other pins: ESD Machine Model = 70V, ESD Human
Body Model = 300V
x Meets MSL3
x Useable down to 1.8V supply
x Adjustable current via single external resistor/voltage
x Small package dimension: 3.3(L)x2.1(W)x1(H) mm3
Specifications (Typical performance @ 25°C)
At 1.575GHz, Vdd = 2.7V, Idd = 6.0mA
x Gain = 18.2 dB
x NF = 0.95 dB
x IIP3 = +2 dBm, IP1dB = -8 dBm
x S11 = -9 dB, S22 = -14 dB
x Cell-Band Rejection: 69 dBc
x PCS-Band Rejection: 67 dBc
Application Circuit
+Vdd = 2.7V
Application
x GPS Receiver Front-end Module
Vbias Rbias
RFin RFout
LNA GPS
Filter

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ALM-1612 pdf
Vdd (Pin 12)
R1
L1
C2 L2
C1
50 -Ohms TL
L3
3
Input
Match
LNA
8
Filter 50 -Ohms TL
2, 4, 5, 6, 7, 9, 10, 11
Vsd (Pin 1)
R2
C3
Figure 7. Demoboard and application schematic diagram
Notes
x L3 and the module’s internal input pre-match form the input matching network. The RFin pin, pin 3, is directly connected to a shunt inductor that
is grounded. The RF output filter blocks DC. Best noise performance is obtained using high-Q wirewound inductors. This circuit demonstrates that
low noise figures are obtainable with standard 0402 chip inductors. Replacing L2 and L3 with high-Q wirewound inductors (eg. Coilcraft 0402CS
series) will yield lower NF and higher Gain.
x C2 and L2 form a matching network at the output of the LNA, which can be tuned to optimize gain, output return loss and linearity. For example,
higher gain can be obtained by increasing the value of C2 but at the expense of stability.
x L1 and R1 isolates the demoboard from external disturbances during measurement. It is not needed in actual application. Likewise, C1 and C3
mitigate the effect of external noise pickup on the Vdd and SD lines respectively. These components are not required in actual operation.
x The output of the module is internally ac-coupled to pin 8.
x Bias control is achieved by either varying the SD voltage with/ without R2, or fixing the SD voltage to Vdd and adjusting R2 for the desired current.
R2 = 3.9 kOhm will result in 6mA when Vdd=Vsd = 2.7V and 4mA when Vdd = Vsd = 1.8V.
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ALM-1612 arduino
ALM-1612 Typical Performance Curves at 25°C, R2 = 3.9 kohm
2.0 2.0
1.8 1.8
1.6 1.6
1.4 1.4
1.2 1.2
1.0 1.0
0.8
0 2 4 6 8 10 12 14 16 18 20
freq, GHz
Figure 25. Edwards-Sinsky Output Stability Factor (Mu) at Vdd = 2.7V
0.8
0 2 4 6 8 10 12 14 16 18 20
freq, GHz
Figure 26. Edwards-Sinsky Input Stability Factor (Mu’) at Vdd = 2.7V
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0 2 4 6 8 10 12 14 16 18 20
freq, GHz
Figure 27. Edwards-Sinsky Output Stability Factor (Mu) at Vdd = 1.8V
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2.0
1.8
1.6
1.4
1.2
1.0
0.8
0 2 4 6 8 10 12 14 16 18 20
freq, GHz
Figure 28. Edwards-Sinsky Input Stability Factor (Mu’) at Vdd = 1.8V
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