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PDF MAX4800 Data sheet ( Hoja de datos )

Número de pieza MAX4800
Descripción (MAX4800 - MAX4802) High-Voltage Analog Switches
Fabricantes Maxim Integrated Products 
Logotipo Maxim Integrated Products Logotipo



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No Preview Available ! MAX4800 Hoja de datos, Descripción, Manual

19-0631; Rev 1; 3/07
Low-Charge Injection,
8-Channel, High-Voltage Analog Switches
General Description
The MAX4800/MAX4801/MAX4802 provide high-volt-
age switching on eight channels for ultrasonic imaging
and printer applications. The devices utilize BCDMOS
process technology to provide eight high-voltage low-
charge-injection SPST switches, controlled by a digital
interface. Data is clocked into an internal 8-bit shift reg-
ister and retained by a programmable latch with enable
and clear inputs. A power-on reset function ensures
that all switches are open on power-up.
The MAX4800/MAX4801/MAX4802 operate with a wide
range of high-voltage supplies including: VPP/VNN =
+100V/-100V, +185V/-15V, and +40V/-160V. The digital
interface operates from a separate VDD supply from
+2.7V to +13.2V. Digital inputs DIN, CLK, LE, and CLR
are +13.2V tolerant, independent of the VDD supply
voltage. The MAX4802 provides integrated 35kbleed
resistors on each switch terminal to discharge capaci-
tive loads.
The MAX4800 and MAX4802 are drop-in replacements
for the Supertex HV20220 and HV232. The devices are
available in the 48-pin TQFP, 26-bump CSBGA, 28-pin
PLCC, and 48-pin TQFN packages. The MAX4801 is a
drop-in replacement for the Supertex HV20320 and is
available in the 28-pin PLCC package. All devices are
specified for the commercial 0°C to +70°C temperature
range.
Applications
Ultrasound Imaging
www.DataSheePt4riUn.tceorms
Features
Pin-Compatible Replacement for Supertex
HV20220 (MAX4800)
Pin-Compatible Replacement for Supertex
HV20320 (MAX4801)
Pin-Compatible Replacement for Supertex HV232
(MAX4802)
Flexible High-Voltage Supplies Up to VPP - VNN =
200V
Low-Charge Injection, Low-Capacitance 22
Switches
DC to 10MHz Analog-Signal Frequency Range
-77dB Off Isolation at 5MHz
Low 10µA Quiescent Current
Integrated Bleed Resistors (MAX4802)
Available in PLCC, TQFP, TQFN, and CSBGA
Packages
Ordering Information/Selector Guide
PART
BLEED
RESISTORS
SECOND SOURCE
PIN-PACKAGE
MAX4800CCM
No
HV20220FG
48 TQFP
MAX4800CQI
No
HV20220PJ
28 PLCC
MAX4800CTM*
No
HV220**
48 TQFN
MAX4800CXZ*
No
HV220**
26 CSBGA
MAX4801CQI*
No
HV20320PJ
28 PLCC
MAX4802CCM
Yes
HV232FG
48 TQFP
MAX4802CQI
MAX4802CTM*
Yes
HV232PJ
28 PLCC
Yes
HV230**
48 TQFN
MAX4802CXZ*
Yes
HV230GA
26 CSBGA
Note: All devices are specified over the commercial 0°C to +70°C temperature range.
*Future product—contact factory for availability.
**Not pin-for-pin compatible.
PACKAGE CODE
C48-6
Q28-4
T4866-1
X07265-1
Q28-4
C48-6
Q28-4
T4866-1
X07265-1
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

1 page




MAX4800 pdf
Low-Charge Injection,
8-Channel, High-Voltage Analog Switches
TIMING CHARACTERISTICS
(VDD = +2.7V to +13.2V, VPP = +40V to VNN + 200V, VNN = -15V to -160V, TA = TMIN to TMAX, unless otherwise noted. Typical values
are at TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
ANALOG SWITCH
Turn-On Time
tON
VNO_ = VPP - 10V, RL = 10k, VNN = -40V
to -160V
5 µs
Turn-Off Time
tOFF
VNO_ = VPP - 10V, RL = 10k, VNN = -40V
to -160V
5 µs
Output Switching Frequency
Maximum VCOM_, VNO_ Slew
Rate
LOGIC TIMING (Figure 1)
CLK Frequency
DIN to CLK Setup Time
DIN to CLK Hold Time
CLK to LE Setup Time
LE Low-Pulse Width
www.DaCtaLSRhHeeigt4hU-P.cuolsme Width
CLK Rise and Fall Times
CLK to DOUT Delay
fSW
dV/dt
Duty cycle = 50%
(Note 3)
fCLK
tDS
tDH
tCS
tWL
tWC
tR, tF
tDO
Daisy chaining
VDD +4.5V
VDD +4.5V
No daisy chaining
VDD +4.5V
VDD < +4.5V
VDD +4.5V
VDD < +4.5V
VDD +4.5V
VDD < +4.5V
VDD +4.5V
VDD < +4.5V
VDD +4.5V
VDD < +4.5V
VDD +4.5V
VDD < +4.5V
VDD +4.5V (Note 3)
VDD < +4.5V (Note 3)
VDD = +5V ± 10%, CL
50pF
TA = 0°C
TA = +25°C
TA = +70°C
VDD = +3V ± 10%, CL TA = TMIN to
50pF
TMAX
20
15
40
35
60
150
300
150
300
150
300
55
60
70
70
50 kHz
V/ns
5
2.5
MHz
10
4
ns
ns
ns
ns
ns
1
µs
1
150
150
150 ns
280
Note 1: Specifications at 0°C are guaranteed by correlation and design. Electrical parameters are tested at worst case conditions.
Note 2: The analog signal input VCOM_ and VNO_ must satisfy VNN (VCOM_, VNO_) VPP, or remain unconnected during power-up
and power-down.
Note 3: Guaranteed by characterization; not production tested.
_______________________________________________________________________________________ 5

5 Page





MAX4800 arduino
Low-Charge Injection,
8-Channel, High-Voltage Analog Switches
Table 1. Serial Interface Programming
D0
(LSB)
D1
D2
L
H
L
H
L
H
X XX
X XX
X = Don’t Care
DATA BITS
D3 D4
D5
L
H
L
H
L
H
XXX
XXX
D6
D7
(MSB)
L
H
L
H
XX
XX
CONTROL BITS
LE CLR
LL
LL
LL
LL
LL
LL
LL
LL
LL
LL
LL
LL
LL
LL
LL
LL
HL
XH
SW0
OFF
ON
OFF
SW1
OFF
ON
OFF
SW2
FUNCTION
SW3 SW4
SW5
OFF
ON
OFF
ON
OFF
ON
OFF
ON
HOLD PREVIOUS STATE
OFF OFF OFF OFF
SW6
OFF
ON
OFF
SW7
OFF
ON
OFF
Applications Information
Logic Levels
The MAX4800/MAX4801/MAX4802 digital interface
inputs CLK, DIN, LE, and CLR are tolerant of up to
+13.2V, independent of the VDD supply voltage, allow-
ing compatibility with higher voltage controllers.
www.DataSheet4U.comDaisy Chaining Multiple Devices
Digital output DOUT is provided to allow the connection
of multiple MAX4800/MAX4801/MAX4802 devices by
daisy chaining (Figure 3). Connect each DOUT to the
DIN of the subsequent device in the chain. Connect CLK,
LE, and CLR inputs of all devices, and drive LE logic-low
to update all devices simultaneously. Drive CLR high to
open all the switches simultaneously. Additional shift reg-
isters may be included anywhere in series with the
MAX4800/MAX4801/MAX4802 data chain.
Supply Sequencing and Bypassing
The MAX4800/MAX4801/MAX4802 do not require spe-
cial sequencing of the VDD, VPP, and VNN supply volt-
ages; however, analog switch inputs must be
unconnected, or satisfy VNN (VCOM_, VNO_) VPP
during power-up and power-down. Bypass VDD, VNN,
and VPP to GND with a 0.1µF ceramic capacitor as
close to the device as possible.
Exposed Paddle
The MAX4800 and MAX4802 provide an exposed pad-
dle for improved thermal performance in the TQFN
package. Connect the exposed paddle to VNN.
Chip Information
PROCESS: BCDMOS
CONNECT EXPOSED PADDLE TO VNN
______________________________________________________________________________________ 11

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