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PDF FDMA3023PZ Data sheet ( Hoja de datos )
| Número de pieza | FDMA3023PZ | |
| Descripción | N-Channel MOSFET | |
| Fabricantes | Fairchild Semiconductor | |
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FDMA3023PZ
Dual P-Channel PowerTrench® MOSFET
-30 V, -2.9 A, 90 mΩ
December 2008
tm
Features
General Description
Max rDS(on) = 90 mΩ at VGS = -4.5 V, ID = -2.9 A
Max rDS(on) = 130 mΩ at VGS = -2.5 V, ID = -2.6 A
Max rDS(on) = 170 mΩ at VGS = -1.8 V, ID = -1.7 A
Max rDS(on) = 240 mΩ at VGS = -1.5 V, ID = -1.0 A
Low profile - 0.8 mm maximum - in the new package MicroFET
2x2 mm
HBM ESD protection level > 2 kV (Note 3)
This device is designed specifically as a single package solution
for the battery charge switch in cellular handset and other
ultra-portable applications. It features two independent
P-Channel MOSFETs with low on-state resistance for minimum
conduction losses. When connected in the typical common
source configuration, bi-directional current flow is possible.
The MicroFET 2X2 package offers exceptional thermal
performance for its physical size and is well suited to linear mode
applications.
RoHS Compliant
Free from halogenated compounds and antimony
oxides
PIN 1
S1 G1 D2
D1 D2
D1 G2 S2
MicroFET 2x2
S1 11
G1 22
D2 33
66 D1
55 G2
44 S2
www.DataSMheeOt4SU.FcoEmT Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDS
VGS
ID
PD
TJ, TSTG
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current -Continuous
-Pulsed
Power Dissipation
Power Dissipation
Operating and Storage Junction Temperature Range
Thermal Characteristics
(Note 1a)
(Note 1a)
(Note 1b)
Ratings
-30
±8
-2.9
-6
1.4
0.7
-55 to +150
Units
V
V
A
W
°C
RθJA
RθJA
RθJA
RθJA
Thermal Resistance for Single Operation, Junction to Ambient
Thermal Resistance for Single Operation, Junction to Ambient
Thermal Resistance for Dual Operation, Junction to Ambient
Thermal Resistance for Dual Operation, Junction to Ambient
Package Marking and Ordering Information
(Note 1a)
(Note 1b)
(Note 1c)
(Note 1d)
86
173
69
151
°C/W
Device Marking
323
Device
FDMA3023PZ
Package
MicroFET 2X2
Reel Size
7 ’’
Tape Width
8 mm
Quantity
3000 units
©2008 Fairchild Semiconductor Corporation
FDMA3023PZ Rev.B1
1
www.fairchildsemi.com
1 page  
Typical Characteristics TJ = 25 °C unless otherwise noted
5
ID = -2.9 A
4
3
2
VDD = -10 V
VDD = -15 V
VDD = -20 V
1
0
0 2 4 6 8 10
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics
1000
100
Ciss
Coss
f = 1 MHz
VGS = 0 V
10
0.1
1
10
-VDS, DRAIN TO SOURCE VOLTAGE (V)
Crss
30
Figure8. CapacitancevsDrain
to Source Voltage
10-2
10-3 VGS = 0 V
10-4
10-5 TJ = 125 oC
10-6
10-7 TJ = 25 oC
10-8
10-9
0 3 6 9 12 15
-VGS, GATE TO SOURCE VOLTAGE (V)
www.DataSheFeitg4uUr.ceo9m. Gate Leakage vs Gate to Source Voltage
10
THIS AREA IS
LIMITED BY rDS(on)
1
1 ms
10 ms
0.1
0.01
0.01
100 ms
SINGLE PULSE
TJ = MAX RATED
RθJA = 173 oC/W
TA = 25 oC
1s
10 s
DC
0.1 1 10
-VDS, DRAIN to SOURCE VOLTAGE (V)
100 200
Figure 10. Forward Bias Safe Operating Area
200
VGS = -4.5 V
100
SINGLE PULSE
RθJA = 173 oC/W
TA = 25 oC
10
1
0.5
10-3
10-2
10-1
1
t, PULSE WIDTH (sec)
Figure 11. Single Pulse Maximum Power Dissipation
10
1000
©2008 Fairchild Semiconductor Corporation
FDMA3023PZ Rev.B1
5
www.fairchildsemi.com
5 Page | ||
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| PDF Descargar | [ Datasheet FDMA3023PZ.PDF ] | |
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