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PDF ADL5331 Data sheet ( Hoja de datos )
| Número de pieza | ADL5331 | |
| Descripción | 1 MHz to 1.2 GHz VGA | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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FEATURES
Voltage-controlled amplifier/attenuator
Operating frequency: 1 MHz to 1.2 GHz
Optimized for controlling output power
High linearity: OIP3 47 dBm @ 100 MHz
Output noise floor: −149 dBm/Hz @ maximum gain
Input impedance: 50 Ω
Output impedance: 20 Ω
Wide gain-control range: 30 dB
Linear-in-dB gain control function: 40 mV/dB
Single-supply voltage: 4.75 V to 5.25 V
APPLICATIONS
Transmit and receive power control at RF and IF
CATV distribution
GENERAL DESCRIPTION
The ADL5331 is a high performance, voltage-controlled
variable gain amplifier/attenuator for use in applications with
frequencies up to 1.2 GHz. The balanced structure of the signal
path maximizes signal swing, eliminates common-mode noise
and minimizes distortion while it also reduces the risk of spu-
rious feed-forward at low gains and high frequencies caused by
parasitic coupling.
The 50 Ω differential input system converts the applied
differential voltage at INHI and INLO to a pair of differential
currents with high linearity and good common-mode rejection.
www.DaTthaeShsiegent4aUl c.cuormrents are then applied to a proprietary voltage-
controlled attenuator providing precise definition of the overall
gain under the control of the linear-in-dB interface. The GAIN
pin accepts a voltage from 0 V at a minimum gain to 1.4 V at a
full gain with a 40 mV/dB scaling factor over most of the range.
1 MHz to 1.2 GHz VGA with
30 dB Gain Control Range
ADL5331
FUNCTIONAL BLOCK DIAGRAM
GAIN
ENBL VPS2 VPS2 VPS2 VPS2
VPS1
GAIN
COM1 CONTROL
VPS2
ADL5331
COM2
INHI
RFIN
INLO
INPUT
GM
STAGE
OUTPUT OPHI
(TZ)
STAGE
OPLO
RFOUT
COM1
VPS1
BIAS
AND
VREF
COM2
VPS2
NC IPBS OPBS COM2 COM2 COM2
Figure 1.
The output of the high accuracy wideband attenuator is applied
to a differential transimpedance output stage. The output stage
provides a differential output at OPHI and OPLO, which must be
pulled up to the supply with RF chokes or a center-tapped balun.
The ADL5331 consumes 240 mA of current including the out-
put pins and operates off a single supply ranging from 4.75 V
to 5.25 V. A power-down function is provided by applying a
logic low input on the ENBL pin. The current consumption in
power-down mode is 250 μA.
The ADL5331 is fabricated on an Analog Devices, Inc., pro-
prietary high performance, complementary bipolar IC process.
The ADL5331 is available in a 24-lead (4 mm × 4 mm), Pb-free
LFCSP_VQ package and is specified for operation from ambient
temperatures of −40°C to +85°C. An evaluation board is also
available.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2009 Analog Devices, Inc. All rights reserved.
1 page  
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter
Supply Voltage VPS1
Supply Voltage VPS2
VPS2 to VPS1
RF Input Power
OPHI, OPLO
ENBL
GAIN
Internal Power Dissipation
θJA (with Pad Soldered to Board)
Maximum Junction Temperature
Operating Temperature Range
Storage Temperature Range
Rating
5.5 V
5.5 V
±200 mV
5 dBm at 50 Ω
5.5 V
VPS1
VPS1
1.2 W
56.1°C/W
150°C
−40°C to +85°C
−65°C to +150°C
ADL5331
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
www.DataSheet4U.com
Rev. 0 | Page 5 of 16
5 Page 
5V
120nH
RFIN
120nH
10nF
10nF
ADL5331
RF VGA
INHI
OPHI
INLO
OPLO
10nF
RFOUT
10nF
ETC1-1-13
Figure 17. Single-Ended Drive with Balanced Output
The device can be driven single-ended with similar perfor-
mance, as shown in Figure 17. The single-ended input interface
can be implemented by driving one of the input terminals and
terminating the unused input to ground. To achieve the optimal
performance, the output must remain balanced. In the case of
Figure 17, a transformer balun is used at the output.
GAIN CONTROL INPUT
When the VGA is enabled, the voltage applied to the GAIN pin
sets the gain. The input impedance of the GAIN pin is 1 MΩ.
The gain control voltage range is between 0.1 V and 1.4 V,
which corresponds to a typical gain range between −15 dB and
+15 dB.
The 1 dB input compression point remains constant at 3 dBm
through the majority of the gain control range, as shown in
Figure 7 through Figure 9. The output compression point
increases decibel for decibel with increasing gain setting. The
noise floor is constant up to VGAIN = 1 V where it begins to rise.
The bandwidth on the gain control pin is approximately 3 MHz.
Figure 10 shows the response time of a pulse on the VGAIN pin.
Although the ADL5331 provides accurate gain control, precise
www.DaretagSuhlaeteiot4nUo.cfoomutput power can be achieved with an automatic
gain control (AGC) loop. Figure 18 shows the ADL5331 in an
AGC loop. The addition of a log amp or a TruPwr™ detector
(such as the AD8362) allows the AGC to have improved
temperature stability over a wide output power control range.
ADL5331
Note that the ADL5331, because of its positive gain slope, in
an AGC application requires a detector with a negative VOUT/
RFIN slope. As an example, the AD8319 in the example in
Figure 19 has a negative slope. The AD8362 rms detector,
however, has a positive slope. Extra circuitry is necessary to
compensate for this.
To operate the ADL5331 in an AGC loop, a sample of the
output RF must be fed back to the detector (typically using
a directional coupler and additional attenuation). A setpoint
voltage is applied to the VSET input of the detector while VOUT
is connected to the GAIN pin of the ADL5331. Based on the
detector’s defined linear-in-dB relationship between VOUT
and the RFIN signal, the detector adjusts the voltage on the
GAIN pin (the detector’s VOUT pin is an error amplifier
output) until the level at the RF input corresponds to the applied
setpoint voltage. The VGAIN setting settles to a value that results
in the correct balance between the input signal level at the
detector and the setpoint voltage.
The detector’s error amplifier uses CLPF, a ground-referenced
capacitor pin, to integrate the error signal (in the form of a
current). A capacitor must be connected to CLPF to set the
loop bandwidth and to ensure loop stability.
5V 5V
RFIN
DAC
VPOS COMM
INHI
OPHI
ADL5331
INLO
OPLO
GAIN
VOUT
LOG AMP OR
TruPwr
DETECTOR
VSET
RFIN
CLPF
DIRECTIONAL
COUPLER
ATTENUATOR
Figure 18. ADL5331 in AGC Loop
Rev. 0 | Page 11 of 16
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet ADL5331.PDF ] | |
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