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Número de pieza | MAX5072 | |
Descripción | Dual-Output Buck or Boost Converter | |
Fabricantes | Maxim Integrated Products | |
Logotipo | ||
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2.2MHz, Dual-Output Buck or Boost
Converter with POR and Power-Fail Output
General Description
The MAX5072 is a dual-output DC-DC converter with inte-
grated high-side n-channel power MOSFETs. Each output
can be configured either as a buck converter or a boost
converter. The MAX5072 is designed to manage the
power requirements of xDSL modems. The wide 5.5V to
23V input voltage range allows for the use of inexpensive
AC adapters to power the device in xDSL modem appli-
cations. Each output is programmable down to 0.8V in the
buck mode and up to 28V in the boost mode with an out-
put voltage accuracy of ±1%. In the buck mode, convert-
er 1 and converter 2 can deliver 2A and 1A, respectively.
The output switching frequency of each converter can be
programmed from 200kHz to 2.2MHz to avoid harmonics
in the xDSL frequency band of operation. Each output
operates 180° out-of-phase, thus reducing input-capaci-
tor ripple current, size, and cost. A SYNC input facilitates
external frequency synchronization. Moreover, a CLKOUT
output provides out-of-phase clock signal with respect to
converter 2, allowing four-phase operation using two
MAX5072 ICs in master-slave configuration.
The MAX5072 includes an internal digital soft-start that
reduces inrush current, eliminates output-voltage over-
shoot, and ensures monotonic rise in output voltage dur-
ing power-up. The device includes a power-good output
and power-on reset as well as manual reset. In addition,
each converter output can be shut down individually. The
MAX5072 features a "dying gasp" output, which goes low
when the input voltage drops below a preprogrammed
voltage. Protection features include output short-circuit
protection for buck mode and maximum duty-cycle limit
for boost operation, as well as thermal shutdown.
The MAX5072 is available in a thermally enhanced 32-pin
thin QFN package that can dissipate 2.7W at +70°C ambi-
ent temperature. The device is rated for operation over the
-40°C to +85°C extended, or -40°C to +125°C automotive
temperature range.
Applications
xDSL Modems
xDSL Routers
Point-of-Load DC-DC Converters
Ordering Information
PART
TEMP RANGE
MAX5072ETJ -40°C to +85°C
*EP = Exposed pad.
PIN-PACKAGE
PKG
CODE
32 Thin QFN-EP*
(5mm x 5mm)
T3255-4
Features
♦ 4.5V to 5.5V or 5.5V to 23V Input Supply Voltage
Range
♦ 0.8V (Buck) to 28V (Boost) Output Voltage
♦ Two Independent Output DC-DC Converters with
Internal Power MOSFETs
♦ Each Output can be Configured in Buck or Boost
Mode
♦ IOUT1 and IOUT2 of 2A and 1A (Respectively) in
Buck Mode
♦ 180° Out-of-Phase Operation
♦ Clock Output for Four-Phase Operation
♦ Switching Frequency Programmable from 200kHz
to 2.2MHz
♦ Digital Soft-Start and Independent Converter
Shutdown
♦ SYNC Input, Power-On Reset, Manual Reset, And
Power-Fail Output
♦ Short-Circuit Protection (Buck)/Maximum Duty-
Cycle Limit (Boost)
♦ Thermal Shutdown
♦ Thermally Enhanced 32-Pin Thin QFN Package
Dissipates up to 2.7W at +70°C
Pin Configuration
TOP VIEW
24 23 22 21 20 19 18 17
PGOOD1 25
16 MR
SOURCE1 26
15 BYPASS
SOURCE1 27
14 VL
PGND 28
SGND 29
MAX5072
13 VL
12 V+
PGND 30
11 OSC
SOURCE2 31
10 PFI
SOURCE2 32
9 SYNC
12345678
Ordering Information continued at end of data sheet.
THIN QFN
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1 page www.DataSheet4U.com
2.2MHz, Dual-Output Buck or Boost
Converter with POR and Power-Fail Output
ELECTRICAL CHARACTERISTICS (continued)
(V+ = VL = 5.2V or V+ = 5.5V to 23V, EN_ = VL, SYNC = GND, IVL = 0, PGND = SGND, CBYPASS = 0.22µF, CVL = 4.7µF (ceramic),
ROSC = 10kΩ (circuit of Figure 1), TA = TJ = TMIN to TMAX, unless otherwise noted.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
POWER-GOOD OUTPUT (PGOOD1)
PGOOD1 Threshold
PGOOD1VTH
PGOOD1 goes high after VOUT crosses
PGOOD1 threshold
90 92.5 95 % VOUT
PGOOD1 Output Voltage
PGOOD1 Output Leakage Current
VPGOOD1
ILKPGOOD1
ISINK = 3mA (MAX5072ETJ)
ISINK = 3mA (MAX5072ATJ)
V+ = VL = 5.2V, VPGOOD1 = 23V, VFB1 = 1V
0.4
V
0.52
1 µA
DYING GASP POWER-FAIL INPUT (PFI), POWER-FAIL OUTPUT (PFO)
PFI Trip Level
PFI Hysteresis
PFI Input Bias Current
PFI Glitch Immunity
VTH
VTHH
IB(PFI)
PFI falling
VPFI = 0.75V
100mV overdrive
0.76 0.78 0.80
20
500
35
V
mV
nA
µs
PFI to PFO Propagation Delay
PFO Output Low Voltage
PFO Output Leakage Current
THERMAL MANAGEMENT
tPFD
VPFO
ILKPFO
50mV overdrive
ISINK = 3mA (MAX5072ETJ)
ISINK = 3mA (MAX5072ATJ)
V+ = VL = 5.2V, VPFO = 5.5V, VPFI = 1V
35
0.4
0.52
1
µs
V
µA
Thermal Shutdown
Thermal Hysteresis
TSHDN
THYST
Junction temperature
Junction temperature
+150
30
°C
°C
Note 1: Specifications at -40°C are guaranteed by design and not production tested.
Note 2: Operating supply range (V+) is guaranteed by VL line regulation test. Connect V+ to VL for 5V operation.
Note 3: Output current may be limited by the power dissipation of the package, see the Power Dissipation section in the
Applications Information.
_______________________________________________________________________________________ 5
5 Page www.DataSheet4U.com
2.2MHz, Dual-Output Buck or Boost
Converter with POR and Power-Fail Output
PIN
28, 30
29
31, 32
EP
Pin Description (continued)
NAME
FUNCTION
PGND
SGND
Power Ground. Connect rectifier diode anode, input capacitor negative, output capacitor negative, and
VL bypass capacitor returns to PGND.
Signal Ground. Connect SGND to the exposed pad. Connect SGND and PGND together at a single point.
Connection to the Converter 2 Internal MOSFET Source.
SOURCE2 Buck Converter Operation—connect SOURCE2 to the switched side of the inductor as shown in Figure 1.
Boost Converter Operation—connect SOURCE2 to PGND (Figure 9).
SGND Exposed Paddle. Connect to SGND. Solder EP to the SGND plane for better thermal performance.
OUTPUT
2.5V/1A
PGOOD1
VL
SGND
VIN = 5.5V TO 23V
VL CLOCK
OUT
ON
OFF
VL
PFO
DYING GASP
32 31 30 29 28 27 26 25
SOURCE2 PGND SGND PGND SOURCE1 PGOOD1
1 CLKOUT
FSEL1 24
2 BST2/VDD2 EP
SGND BST1/VDD1 23
3 DRAIN2
DRAIN1 22
4 DRAIN2
5 EN2
6 FB2
MAX5072
DRAIN1 21
EN1 20
FB1 19
ON
OFF
7 COMP2
COMP1 18
8 PFO
RST 17
SYNC PFI OSC V+ VL VL BYPASS MR
9 10 11 12 13 14 15 16
VOUT1
SYSTEM
CLOCK
MANUAL
RESET
µP RESET INPUT
VL
OUTPUT
3.3V/2A
PGND
SGND*
*CONNECT PGND AND SGND TOGETHER AT ONE POINT NEAR THE
RETURN TERMINALS OF THE V+ AND VL BYPASS CAPACITORS.
Figure 1. MAX5072 Dual Buck Regulator Application Circuit
______________________________________________________________________________________ 11
11 Page |
Páginas | Total 27 Páginas | |
PDF Descargar | [ Datasheet MAX5072.PDF ] |
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