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Número de pieza | AP7173 | |
Descripción | 1.5A LOW DROPOUT LINEAR REGULATOR | |
Fabricantes | Diodes Incorporated | |
Logotipo | ||
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AP7173
1.5A LOW DROPOUT LINEAR REGULATOR WITH
PROGRAMMABLE SOFT-START
Features
• Low VIN and wide VIN range: 1.0V to 5.5V
• Bias voltage (VVCC) range: 2.7V to 5.5V
• Low VOUT range: 0.8V to 3.3V
• Low dropout: 165mV typical at 1.5A, VVCC = 5V
• 2% accuracy over line, load and temperature range
• Power-Good (PG) output for supply monitoring and for
sequencing of other supplies
• Programmable soft-start provides linear voltage startup
• Bias supply permits low VIN operation with good
transient response
• Stable with any output capacitor ≥ 2.2µF
• DFN3030-10 and SOP-8L-EP: available in “Green”
molding compound (No Br, Sb)
• Lead-free finish/ RoHS Compliant (Note 1)
General Description
The AP7173 is a 1.5A low-dropout (LDO) linear regulator that
features a user-programmable soft-start, an enable input and a
power-good output.
The soft-start reduces inrush current of the load capacitors and
minimizes stress on the input power source during start-up. The
enable input and power-good output allow users to configure
power management solutions that can meet the sequencing
requirements of FPGAs, DSPs, and other applications with
different start-up and power-down requirements.
The AP7173 is stable with any type of output capacitor of 2.2µF or
more. A precision reference and feedback control deliver 2%
accuracy over load, line, and operating temperature ranges. The
AP7173 is available in both DFN3030-10 and SOP-8L-EP
packages.
Applications
• PCs, Servers, Modems, and Set-Top-Boxes
• FPGA Applications
• DSP Core and I/O Voltages
• Post-Regulation Applications
• Applications With Sequencing Requirements
Ordering Information
AP 7173 - X X X
Package
FN : DFN3030-10
SP : SOP-8L-EP
Lead Free
G : Green
Packing
-7/13 : Tape & Reel
Device
AP7173-FN
AP7173-SP
Package
Code
FN
SP
Packaging
(Note 2)
DFN3030-10
SOP-8L-EP
7”/13” Tape and Reel
Quantity
Part Number Suffix
3000/Tape & Reel
-7
2500/Tape & Reel
-13
Notes:
1. RoHS revision 13.2.2003. Glass and high temperature solder exemptions applied, see EU Directive Annex Notes 5 and 7.
2. Pad layout as shown on Diodes Inc. suggested pad layout document can be found on our website at
http://www.diodes.com/datasheets/ap02001.pdf.
AP7173 Rev. 4
1 of 15
www.diodes.com
MARCH 2008
© Diodes Incorporated
1 page www.DataSheet4U.com
AP7173
1.5A LOW DROPOUT LINEAR REGULATOR WITH
PROGRAMMABLE SOFT-START
Absolute Maximum Ratings (Note 5)
Symbol
Parameter
Ratings
Unit
ESD HBM Human Body Model ESD Protection
4000
V
ESD MM Machine Model ESD Protection
350 V
VIN, VVCC
VEN
VPG
VSS
VFB
VOUT
IOUT
TJ
TST
Input Voltage Range
Enable Voltage Range
Power-Good Voltage Range
Soft-Start Voltage Range
Feedback Voltage Range
Output Voltage Range
Maximum Output Current
Junction Temperature Range
Storage Junction Temperature Range
-0.3 to +6
V
-0.3 to +6
V
-0.3 to +6
V
-0.3 to +6
V
-0.3 to +6
V
-0.3 to VIN +0.3
V
Internally Limited
-40 to +150
ºC
-65 to +150
ºC
Notes:
5. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only
and functional operation of the device at these conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods
may affect device reliability.
Recommended Operating Conditions
Symbol
Parameter
VIN
VVCC
IOUT
TA
Input Voltage (Note 6)
Bias Voltage
Output Current
Operating Ambient Temperature
Notes 6. At VIN =1V, the maximum load currents may be lower than 1.5A.
Min
Max
Unit
1.0 5.5 V
2.7 5.5 V
0 1.5 A
-40 85 ºC
AP7173 Rev. 4
5 of 15
www.diodes.com
MARCH 2008
© Diodes Incorporated
5 Page www.DataSheet4U.com
AP7173
1.5A LOW DROPOUT LINEAR REGULATOR WITH
PROGRAMMABLE SOFT-START
Application Note
BIAS VOLTAGE VVCC
The AP7173 is a low VIN, low dropout regulator that uses an
NMOS pass FET. The VCC pin must be connected to a DC
bias supply VVCC for the internal control circuitry and the gate
drive of the pass FET to function properly and to obtain low
dropout. The VVCC needs to be equal to or higher than the VIN
and in the range of 2.7V-5.5V. Figure 27 illustrates the typical
application circuit for the AP7173.
VIN
C1
+5V
C3
R3
IN OUT
PG
AP7173
VCC
FB
SS
EN GND
VOUT
R1 C2
R2
CSS
Figure 27. Typical Application Circuit for AP7173
ADJUSTABLE OUTPUT VOLTAGE
With an external voltage divider, the AP7173 can provide
output voltage from 0.8V to 3.3V. R1 and R2 can be calculated
for any output voltage using the following equation, where
VREF=0.8 is the AP7173’s internal reference voltage. Refer to
Table 1 for resistor combinations for commonly used output
voltages. For maximum voltage accuracy, R2 should be ≤ 5kΩ.
VOUT = VREF x (1 + R1/R2)
INPUT VIN AND BIAS VVCC CAPACITORS
It is important to keep the IN and VCC pins clear of large
ripples, glitches and other noises by connecting capacitors to
the IN and VCC pins. The required capacitance on these pins
is strongly dependent on source and wiring impedance of the
supplies.
To provide good decoupling for the input power supply VIN, it is
recommended that a ceramic capacitor with capacitance of at
least 1μF is connected between the IN and GND pins at a
location as close to them as possible. High quality, low ESR
capacitors should be used for better performance.
It is critical to provide good decoupling to the VCC pin for the
AP7173’s internal control circuitry to function properly. The
minimum recommended capacitance for the VVCC is 1μF when
the VVCC and VIN are separate supplies. If the VIN and VVCC are
connected to the same supply, the recommended minimum
capacitance for VVCC is 4.7μF. Again good quality, low ESR
capacitors should be used for optimum performance.
OUTPUT CAPACITOR
The output capacitor affects the stability and transient response
of the LDO. The AP7173 is designed to be stable for all types
of output capacitors ≥ 2.2μF, single or multiple in parallel. Using
high-quality, low ESR capacitors and placing them close to the
OUT and GND pins can improve perfomance.
DROPOUT VOLTAGE
The very low dropout makes the AP7173 well suited for
high-current, low VIN/low VOUT applications. To achieve the
specified low-dropout performance for such applications, the
VCC pin should be connected to a separate supply of at least
3.25V higher than VOUT. Figure 28 shows an application circuit
where VVCC is 5V and VOUT is 1.2V.
VVCC (5V) VIN (1.5V)
Vref
VCC
+
_
IN
OUT
AP7173
FB
IOUT (1.5A)
VOUT (1.2V)
R1
C2
R2
Figure 28. Typical Application Circuit for AP7173
Using Separate VCC and IN Rails
For applications where low dropout is not required or a separate
VVCC supply is not available, the IN and VCC pins can be tied
together. In this situation, a voltage difference of at least 1.7V
between the VVCC and VOUT has to be maintained for the VVCC to
provide enough gate drive to the pass FET. Therefore, the VOUT
needs to be 1.7V or more below VIN, as shown in Figure 29.
VIN (3.0V)
VCC
+
_
Vref
IN
OUT
IOUT (1.5A)
VOUT (1.2V)
R1
C2
AP7173
FB
R2
Figure 29. Typical Application Circuit for AP7173
Without an Auxiliary VCC Rail
PROGRAMMABLE SOFT-START
The AP7173 features a voltage-controlled soft-start that is
programmable with an external capacitor (CSS). The AP7173
achieves a monotonic soft-start by tracking the voltage ramp of
the external soft-start capacitor until the ramp voltage reaches
the internal reference voltage. The relationship between the
soft-start time and the soft-start charging current (ISS), soft-start
capacitance (CSS), and the internal reference voltage (VREF) is
tSS = (VREF x CSS) / ISS
Refer to Table 2 for suggested soft-start capacitor values.
AP7173 Rev. 4
11 of 15
www.diodes.com
MARCH 2008
© Diodes Incorporated
11 Page |
Páginas | Total 15 Páginas | |
PDF Descargar | [ Datasheet AP7173.PDF ] |
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