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PDF MB2373 Data sheet ( Hoja de datos )

Número de pieza MB2373
Descripción Dual octal transparent latch 3-State
Fabricantes NXP Semiconductors 
Logotipo NXP Semiconductors Logotipo



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No Preview Available ! MB2373 Hoja de datos, Descripción, Manual

Philips Semiconductors Advanced BiCMOS Products
www.DataDShueaet4lUo.cocmtal transparent latch (3-State)
Product specification
MB2373
FEATURES
16-bit transparent latch
Multiple VCC and GND pins minimize
switching noise
Power-up 3-State
Live insertion/extraction permitted
Power-up reset
3-State output buffers
Output capability: +64mA/–32mA
Latch-up protection exceeds 500mA per
JEDEC JC40.2 Std 17
ESD protection exceeds 2000V per MIL
STD 883 Method 3015 and 200V per
Machine Model
DESCRIPTION
The MB2373 high-performance BiCMOS
device combines low static and dynamic
power dissipation with high speed and high
output drive.
The MB2373 device is a dual octal
transparent latch coupled to two sets of eight
3-State output buffers. The two sections of
the device are controlled independently by
Enable (nE) and Output Enable (nOE) control
gates.
The data on each set of D inputs are
transferred to the latch outputs when the
Latch Enable (nE) input is High. The latch
remains transparent to the data inputs while
nE is High, and stores the data that is present
one setup time before the High-to-Low
enable transition.
The 3-State output buffers are designed to
drive heavily loaded 3-State buses, MOS
memories, or MOS microprocessors. Each
active-Low Output Enable (nOE) controls
eight 3-State buffers independent of the latch
operation.
When nOE is Low, the latched or transparent
data appears at the outputs. When nOE is
High, the outputs are in the High–impedance
“OFF” state, which means they will neither
drive nor load the bus.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
Tamb = 25°C; GND = 0V
TYPICAL
UNIT
tPLH Propagation delay
tPHL Dn to Qn
CL = 50pF; VCC = 5V
2.9 ns
CIN Input capacitance
VI = 0V or VCC
4 pF
COUT
Output capacitance
VO = 0V or VCC; 3-State
7 pF
ICCZ
Total supply current
Outputs disabled; VCC = 5.5V
500 nA
ORDERING INFORMATION
PACKAGES
52–pin plastic Quad Flat Pack
TEMPERATURE RANGE
–40°C to +85°C
ORDER CODE
MB2373BB
DRAWING NUMBER
1418B
PIN CONFIGURATION
LOGIC SYMBOL
VCC 1
1Q4 2
1Q5 3
ÈGND 4
ÈÈ1Q6 5
1Q7 6
GND 7
2Q0 8
2Q1 9
GND 10
2Q2 11
2Q3 12
VCC 13
52 51 50 49 48 47 46 45 44 43 42 41 40
MB2373
52–pin PQFP
39 VCC
38 1D4
37 1D5
È36 GND
ÈÈ35 1D6
34 1D7
33 GND
32 2D0
31 2D1
30 GND
29 2D2
28 2D3
27 VCC
14 15 16 17 18 19 20 21 22 23 24 25 26
47 45
19 21
48
1Q0 1OE
1E
1D0
44 8
2Q0 2OE
2E
2D0
32
49 1Q1
1D1 43 9
2Q1
2D21
31
51 1Q2
1D2 41 11
2Q2
2D2 29
52 1Q3
1D3 40 12
2Q3
2D3 28
2
1Q4
1D4 38 14
2Q4
2D4 26
3
1Q5
1D5 37 15
2Q5
2D5 25
5
1Q6
1D6 35 17
2Q6
2D6 23
6
1Q7
1D7 34 18
2Q7
2D7 22
August 23, 1993
1 853-1669 10587

1 page




MB2373 pdf
Philips Semiconductors Advanced BiCMOS Products
www.DataDShueaet4lUo.ccomtal transparent latch (3-State)
Product specification
MB2373
AC CHARACTERISTICS
GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500
SYMBOL
PARAMETER
WAVEFORM
tPLH
tPHL
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
Propagation delay
nDx to nQx
Propagation delay
nE to nQx
Output enable time
to High and Low level
Output disable time
from High and Low level
2
1
4
5
4
5
LIMITS
Tamb = +25oC
VCC = +5.0V
MIN TYP MAX
1.3 2.8 4.1
1.3 2.9 4.1
1.8 3.5 4.9
2.0 3.5 4.9
1.2 2.9 4.1
2.1 3.8 5.3
1.4 3.7 5.0
2.0 3.6 4.6
Tamb = -40 to
+85oC
VCC = +5.0V ±0.5V
MIN MAX
1.3 4.8
1.3 4.8
1.8 5.7
2.0 5.5
1.2 5.1
2.1 6.1
1.4 5.5
2.0 5.1
UNIT
ns
ns
ns
ns
AC SETUP REQUIREMENTS
GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500
SYMBOL
PARAMETER
WAVEFORM
ts(H)
ts(L)
th(H)
th(L)
tw(H)
Setup time, High or Low
nDx to nE
Hold time, High or Low
nDx to nE
Enable pulse width
High
3
3
1
Tamb = +25oC
VCC = +5.0V
MIN TYP
1.0 0.0
1.0 0.3
0.5 –0.2
0.5 0.0
2.5 1.0
LIMITS
Tamb = -40 to +85oC
VCC = +5.0V ±0.5V
MIN
1.0
1.0
0.5
0.5
2.5
UNIT
ns
ns
ns
August 23, 1993
5

5 Page





MB2373 arduino
Philips Semiconductors Advanced BiCMOS Products
www.DataDShueaet4lUo.ccomtal transparent latch (3-State)
Product specification
MB2373
tTHL vs Temperature (Tamb)
CL = 50pF, 1 Output Switching
4
3
2 4.5VCC
5.5VCC
1
0
–55 –35 –15
5
25 45 65 85 105 125
°C
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
–0.5
0
VOHV and VOLP vs Load Capacitance
VCC = 5V, VIN = 0 to 3V
125°C
25°C
–55°C
125°C
25°C
–55°C
50 100 150 200
pF
Adjustment of tTHL for
Load Capacitance and # of Outputs Switching
4
3 16 switching
8 switching
1 switching
2
1
0
–1
–2
0
50 100 150 200
pF
VOHP and VOLV vs Load Capacitance
VCC = 5V, VIN = 0 to 3V
5
4 125°C
25°C
3 –55°C
2
1
0
125°C
25°C
–55°C
–1
–2
0
50 100 150 200
pF
August 23, 1993
11

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