PDF CY8C23533 Data sheet ( Hoja de datos )

Número de pieza	CY8C23533
Descripción	(CY8C23433 / CY8C23533) Programmable System-on-Chip
Fabricantes	Cypress Semiconductor
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No Preview Available ! www.DataSheet4U.com CY8C23433, CY8C23533 PSoC® Programmable System-on-Chip™ Features ■ Powerful Harvard Architecture Processor ❐ M8C Processor Speeds to 24 MHz ❐ 8x8 Multiply, 32-Bit Accumulate ❐ Low Power at High Speed ❐ 3.0 to 5.25V Operating Voltage ❐ Industrial Temperature Range: -40°C to +85°C ■ Advanced Peripherals (PSoC Blocks) ❐ 4 Rail-to-Rail analog PSoC Blocks Provide: • Up to 14-Bit ADCs • Up to 8-Bit DACs • Programmable Gain Amplifiers • Programmable Filters and Comparators ❐ 4 Digital PSoC Blocks Provide: • 8 to 32-Bit Timers, Counters, and PWMs • CRC and PRS Modules • Full-Duplex UART • Multiple SPI™ Masters or Slaves • Connectable to All GPIO Pins ❐ Complex Peripherals by Combining Blocks ❐ High-Speed 8-Bit SAR ADC Optimized for Motor Control ■ Precision, Programmable Clocking ❐ Internal ±2.5% 24/48 MHz Oscillator ❐ High Accuracy 24 MHz with Optional 32 kHz Crystal and PLL ❐ Optional External Oscillator, up to 24 MHz ❐ Internal Oscillator for Watchdog and Sleep ■ Flexible On-Chip Memory ❐ 8K Bytes Flash Program Storage 50,000 Erase/Write Cycles ❐ 256 Bytes SRAM Data Storage ❐ In-System Serial Programming (ISSP) ❐ Partial Flash Updates ❐ Flexible Protection Modes ❐ EEPROM Emulation in Flash ■ Programmable Pin Configurations ❐ 25 mA Sink on all GPIO ❐ Pull up, Pull Down, High Z, Strong, or Open Drain Drive Modes on All GPIO ❐ Up to Ten Analog Inputs on GPIO ❐ Two 30 mA Analog Outputs on GPIO ❐ Configurable Interrupt on All GPIO ■ Additional System Resources ❐ I2C™ Slave, Master, and Multi-Master to 400 kHz ❐ Watchdog and Sleep Timers ❐ User-Configurable Low Voltage Detection ❐ Integrated Supervisory Circuit ❐ On-chip Precision Voltage Reference ■ Complete Development Tools ❐ Free Development Software (PSoC Designer™) ❐ Full-Featured In-Circuit Emulator and Programmer ❐ Full Speed Emulation ❐ Complex Breakpoint Structure ❐ 128K Bytes Trace Memory Logic Block Diagram PSoC CORE Port 3 Port 2 Port 1 Port 0 Analog Drivers System Bus Global Digital Interconnect Global Analog Interconnect SRAM 256 Bytes Interrupt Controller SROM Flash 8K CPUCore (M 8C) Sleep and Watchdog Multiple ClockSources (Includes IMO, ILO, PLL, and ECO) DIGITAL SYSTEM Digital Block Array 1 Row 4 Blocks ANALOG SYSTEM Analog Block Array 2 Columns 4 Blocks SAR8 ADC Analog Ref Analog Input Muxing Digital Clocks Multiply Accum . Decim ator POR and LVD Internal I2C System Resets Voltage Ref. SYSTEM RESOURCES Cypress Semiconductor Corporation • 198 Champion Court Document Number: 001-44369 Rev. B • San Jose, CA 95134-1709 • 408-943-2600 Revised December 05, 2008 [+] Feedback 1 page www.DataSheet4U.com CY8C23433, CY8C23533 Development Tools PSoC Designer is a Microsoft® Windows-based, integrated development environment for the Programmable System-on-Chip (PSoC) devices. The PSoC Designer IDE and application runs on Windows NT 4.0, Windows 2000, Windows Millennium (Me), or Windows XP (refer section PSoC Designer Subsystems on page 5). PSoC Designer helps the customer to select an operating configuration for the PSoC, write application code that uses the PSoC, and debug the application. This system provides design database management by project, an integrated debugger with In-Circuit Emulator, in-system programming support, and the CYASM macro assembler for the CPUs. PSoC Designer also supports a high-level C language compiler developed specifically for the devices in the family. Figure 3. PSoC Designer Subsystems PSoC Designer Graphical Designer Interface Context Sensitive Help Importable Design Database Device Database Application Database Project Database User Modules Library PSoC Designer Core Engine PSoC Configuration Sheet Manufacturing Information File Emulation Pod In-Circuit Emulator Device Programmer PSoC Designer Software Subsystems Device Editor The Device Editor subsystem allows the user to select different onboard analog and digital components called user modules using the PSoC blocks. Examples of user modules are ADCs, DACs, Amplifiers, and Filters. The device editor also supports easy development of multiple configurations and dynamic reconfiguration. Dynamic configuration allows for changing configurations at run time. PSoC Designer sets up power on initialization tables for selected PSoC block configurations and creates source code for an application framework. The framework contains software to operate the selected components and, if the project uses more than one operating configuration, contains routines to switch between different sets of PSoC block configurations at run time. PSoC Designer can print out a configuration sheet for a given project configuration for use during application programming in conjunction with the Device Data Sheet. Once the framework is generated, the user can add application-specific code to flesh out the framework. It is also possible to change the selected components and regenerate the framework. Design Browser The Design Browser allows users to select and import preconfigured designs into the user’s project. Users can easily browse a catalog of preconfigured designs to facilitate time-to-design. Examples provided in the tools include a 300-baud modem, LIN Bus master and slave, fan controller, and magnetic card reader. Application Editor In the Application Editor you can edit your C language and Assembly language source code. You can also assemble, compile, link, and build. Assembler. The macro assembler allows the assembly code to be merged seamlessly with C code. The link libraries automatically use absolute addressing or can be compiled in relative mode, and linked with other software modules to get absolute addressing. C Language Compiler. A C language compiler is available that supports the PSoC family of devices. Even if you have never worked in the C language before, the product quickly allows you to create complete C programs for the PSoC family devices. The embedded, optimizing C compiler provides all the features of C tailored to the PSoC architecture. It comes complete with embedded libraries providing port and bus operations, standard keypad and display support, and extended math functionality. Document Number: 001-44369 Rev. B Page 5 of 37 [+] Feedback 5 Page www.DataSheet4U.com CY8C23433, CY8C23533 Table 6. Register Map Bank 0 Table: User Space PRT0DR PRT0IE PRT0GS PRT0DM2 PRT1DR PRT1IE PRT1GS PRT1DM2 PRT2DR PRT2IE PRT2GS PRT2DM2 PRT3DR PRT3IE PRT3GS PRT3DM2 DBB00DR0 DBB00DR1 DBB00DR2 DBB00CR0 DBB01DR0 DBB01DR1 DBB01DR2 DBB01CR0 DCB02DR0 DCB02DR1 DCB02DR2 DCB02CR0 DCB03DR0 DCB03DR1 DCB03DR2 DCB03CR0 Gray fields are reserved. 00 RW 01 RW 02 RW 03 RW 04 RW 05 RW 06 RW 07 RW 08 RW 09 RW 0A RW 0B RW 0C RW 0D RW 0E RW 0F RW 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 20 # AMX_IN 21 W 22 RW 23 # ARF_CR 24 # CMP_CR0 25 W ASY_CR 26 RW CMP_CR1 27 # SARADC_DL 28 # 29 W SARADC_CR0 2A RW SARADC_CR1 2B # 2C # TMP_DR0 2D W TMP_DR1 2E RW TMP_DR2 2F # TMP_DR3 30 ACB00CR3 31 ACB00CR0 32 ACB00CR1 33 ACB00CR2 34 ACB01CR3 35 ACB01CR0 36 ACB01CR1 * 37 ACB01CR2 * 38 39 3A 3B 3C 3D # Access is bit specific. Document Number: 001-44369 Rev. *B 40 41 42 43 44 ASD11CR0 45 ASD11CR1 46 ASD11CR2 47 ASD11CR3 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54 ASC21CR0 55 ASC21CR1 56 ASC21CR2 57 ASC21CR3 58 59 5A 5B 5C 5D 5E 5F 60 RW 61 62 63 RW 64 # 65 # 66 RW 67 RW 68 69 # 6A RW 6B 6C RW 6D RW 6E RW 6F RW 70 RW RDI0RI 71 RW RDI0SYN 72 RW RDI0IS 73 RW RDI0LT0 74 RW RDI0LT1 75 RW RDI0RO0 76 RW RDI0RO1 77 RW 78 79 7A 7B 7C 7D 80 81 82 83 84 RW 85 RW 86 RW 87 RW 88 89 8A 8B 8C 8D 8E 8F 90 91 92 93 94 RW 95 RW 96 RW I2C_CFG 97 RW I2C_SCR 98 I2C_DR 99 I2C_MSCR 9A INT_CLR0 9B INT_CLR1 9C 9D INT_CLR3 9E INT_MSK3 9F A0 INT_MSK0 A1 INT_MSK1 A2 INT_VC A3 RES_WDT A4 DEC_DH A5 DEC_DL A6 DEC_CR0 A7 DEC_CR1 A8 MUL0_X A9 MUL0_Y AA MUL0_DH AB MUL0_DL AC ACC0_DR1 AD ACC0_DR0 AE ACC0_DR3 AF ACC0_DR2 B0 RW B1 RW B2 RW B3 RW B4 RW B5 RW B6 RW B7 CPU_F B8 B9 BA BB BC BD C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF D0 D1 D2 D3 D4 D5 D6 RW D7 # D8 RW D9 # DA RW DB RW DC DD RW DE RW DF E0 RW E1 RW E2 RC E3 W E4 RC E5 RC E6 RW E7 RW E8 W E9 W EA R EB R EC RW ED RW EE RW EF RW F0 F1 F2 F3 F4 F5 F6 F7 RL F8 F9 FA FB FC FD Page 11 of 37 [+] Feedback 11 Page

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