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PDF CY8C21434 Data sheet ( Hoja de datos )
| Número de pieza | CY8C21434 | |
| Descripción | (CY8C21x34) Mixed-Signal Array | |
| Fabricantes | Cypress Semiconductor | |
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CY8C21634, CY8C21534
CY8C21434, CY8C21334, CY8C21234
PSoC® Mixed-Signal Array
Features
■ Powerful Harvard Architecture Processor
❐ M8C Processor Speeds to 24 MHz
❐ Low power at high speed
❐ 2.4V to 5.25V Operating Voltage
❐ Operating Voltages Down to 1.0V using On-Chip Switch
Mode Pump (SMP)
❐ Industrial Temperature Range: -40°C to +85°C
■ Advanced Peripherals (PSoC Blocks)
❐ 4 Analog Type “E” PSoC Blocks provide:
• 2 Comparators with DAC Refs
• Single or Dual 8-Bit 28 Channel ADC
❐ 4 Digital PSoC Blocks provide:
• 8 to 32-Bit Timers, Counters, and PWMs
• CRC and PRS Modules
• Full-Duplex UART, SPI™ Master or Slave
• Connectable to All GPIO Pins
❐ Complex Peripherals by Combining Blocks
■ Flexible On-Chip Memory
❐ 8K Flash Program Storage 50,000 Erase/Write Cycles
❐ 512 Bytes SRAM Data Storage
❐ In-System Serial Programming (ISSP™)
❐ Partial Flash Updates
❐ Flexible Protection Modes
❐ EEPROM Emulation in Flash
■ Complete Development Tools
❐ Free Development Software
(PSoC Designer™)
❐ Full-Featured, In-Circuit Emulator and Programmer
❐ Full Speed Emulation
❐ Complex Breakpoint Structure
❐ 128K Trace Memory
■ Precision, Programmable Clocking
❐ Internal ±2.5% 24/48 MHz Oscillator
❐ Internal Oscillator for Watchdog and Sleep
■ Programmable Pin Configurations
❐ 25 mA Drive on All GPIO
❐ Pull Up, Pull Down, High Z, Strong, or Open Drain Drive
Modes on All GPIO
❐ Up to 8 Analog Inputs on GPIO
❐ Configurable Interrupt on All GPIO
■ Versatile Analog Mux
❐ Common Internal Analog Bus
❐ Simultaneous Connection of IO Combinations
❐ Capacitive Sensing Application Capability
■ Additional System Resources
❐ I2C™ Master, Slave and Multi-Master to 400 kHz
❐ Watchdog and Sleep Timers
❐ User-Configurable Low Voltage Detection
❐ Integrated Supervisory Circuit
❐ On-Chip Precision Voltage Reference
Block Diagram
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 38-12025 Rev. *M
• San Jose, CA 95134-1709 • 408-943-2600
Revised April 18, 2008
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CY8C21634, CY8C21534
CY8C21434, CY8C21334, CY8C21234
Figure 3. PSoC Designer Subsystems
PSoC Designer Software Subsystems
Device Editor
The device editor subsystem enables the user to select different
onboard analog and digital components called user modules
using the PSoC blocks. Examples of user modules are ADCs,
DACs, Amplifiers, and Filters.
The device editor also supports easy development of multiple
configurations and dynamic reconfiguration. Dynamic
reconfiguration allows changing configurations at run time.
PSoC Designer sets up power on initialization tables for selected
PSoC block configurations and creates source code for an
application framework. The framework contains software to
operate the selected components and, if the project uses more
than one operating configuration, contains routines to switch
between different sets of PSoC block configurations at run time.
PSoC Designer can print out a configuration sheet for a given
project configuration for use during application programming in
conjunction with the Device Data Sheet. After the framework is
generated, the user can add application-specific code to flesh
out the framework. It is also possible to change the selected
components and regenerate the framework.
Design Browser
The Design Browser enables users to select and import
preconfigured designs into the user’s project. Users can easily
browse a catalog of preconfigured designs to facilitate
time-to-design. Examples provided in the tools include a
300-baud modem, LIN Bus master and slave, fan controller, and
magnetic card reader.
Application Editor
In the Application Editor you can edit your C language and
Assembly language source code. You can also assemble,
compile, link, and build.
Assembler. The macro assembler allows the seamless
merging of the assembly code with C code. The link libraries
automatically use absolute addressing or are compiled in relative
mode, and linked with other software modules to get absolute
addressing.
C Language Compiler. A C language compiler that supports
the PSoC family of devices is available. Even if you have never
worked in the C language before, the product quickly helps you
create complete C programs for the PSoC family devices.
The embedded, optimizing C compiler provides all the features
of C tailored to the PSoC architecture. It comes complete with
embedded libraries providing port and bus operations, standard
keypad and display support, and extended math functionality.
Debugger
The PSoC Designer Debugger subsystem provides hardware
in-circuit emulation, allowing the designer to test the program in
a physical system while providing an internal view of the PSoC
device. Debugger commands allow the designer to read the
program and read and write data memory, read and write IO
registers, read and write CPU registers, set and clear break-
points, and provide program run, halt, and step control. The
debugger also allows the designer to create a trace buffer of
registers and memory locations of interest.
Online Help System
The online help system displays online, context-sensitive help
for the user. Designed for procedural and quick reference, each
functional subsystem has its own context-sensitive help. This
system also provides tutorials and links to FAQs and an Online
Support Forum to aid the designer in getting started.
Hardware Tools
In-Circuit Emulator
A low cost, high functionality ICE (In-Circuit Emulator) is
available for development support. This hardware has the
capability to program single devices.
The emulator consists of a base unit that connects to the PC by
way of a USB port. The base unit is universal and operates with
all PSoC devices. Emulation pods for each device family are
available separately. The emulation pod takes the place of the
PSoC device in the target board and performs full speed
(24 MHz) operation.
Document Number: 38-12025 Rev. *M
Page 5 of 43
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32-Pin Part Pinout
Figure 8. CY8C21434 32-Pin PSoC Device
CY8C21634, CY8C21534
CY8C21434, CY8C21334, CY8C21234
Figure 9. CY8C21634 32-Pin PSoC Device
Figure 10. CY8C21434 32-Pin Sawn PSoC Device
Figure 11. CY8C21634 32-Pin Sawn PSoC Device
A, I, M, P0[1]
M, P2[7]
M, P2[5]
M, P2[3]
M, P2[1]
M, P3[3]
M, P3[1]
M, 12C SCL, P1[7]
1
2
3
4
5
6
7
8
QFN
(Top View)
24 P0[0], A, I, M
23 P2[6], M
22 P2[4], M
21 P2[2], M
20 P2[0], M
19 P3[2], M
18 P3[0], M
17 XRES
A, I, M, P0[1]
M, P2[7]
M, P2[5]
M, P2[3]
M, P2[1]
SMP
Vss
M, 12C SCL, P1[7]
1
2
3
4
5
6
7
8
QFN
(Top View)
24 P0[0], A, I, M
23 P2[6], M
22 P2[4], M
21 P2[2], M
20 P2[0], M
19 P3[2], M
18 P3[0], M
17 XRES
Document Number: 38-12025 Rev. *M
Page 11 of 43
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| PDF Descargar | [ Datasheet CY8C21434.PDF ] | |
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