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PDF HT95R34 Data sheet ( Hoja de datos )
| Número de pieza | HT95R34 | |
| Descripción | I/O Type Phone 8-Bit MCU | |
| Fabricantes | Holtek Semiconductor | |
| Logotipo |  |
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HT95R34
I/O Type Phone 8-bit MCU with DTMF Receiver
Technical Document
· Tools Information
· FAQs
· Application Note
- HA0075E MCU Reset and Oscillator Circuits Application Note
Features
· Operating voltage at fSYS= 3.58MHz: 2.2V~5.5V
· 8K´16 OTP type Program Memory
· 2112´8 Data Memory
· 26 bidirectional I/Os with pull-high options
· 2 NMOS output-only lines
· External interrupt input
· Dual 16-bit timers with interrupts
· Timer external input
· 8-level stack
· 32768Hz system oscillator
· 32768Hz to 3.58MHz frequency-up PLL circuit
· Real time clock function
· Watchdog timer function
· PFD driver output
· DTMF generator
· DTMF receiver
· Power-down and wake-up feature for power-saving
operation: Idle mode, Sleep mode, Green mode and
normal mode
· Up to 1.117ms instruction cycle with 3.58MHz system
clock at VDD=2.2V~5.5V
· Bit manipulation instructions
· Table read function
· 63 powerful instructions
· All instructions executed in 1 or 2 machine cycles
· Low voltage reset function
· Supported by comprehensive suite of hardware and
software tools
· 48-pin SSOP package
General Description
The HT95R34 MCU is an 8-bit high performance, RISC
architecture microcontroller device specially designed
for telephone applications. Device flexibility is en-
hanced with their internal special features such as
power-down and wake-up functions, DTMF generator,
DTMF receiver, PFD driver, etc. These features com-
bine to ensure applications require a minimum of exter-
nal components and therefore reduce overall product
costs.
Having the advantages of low-power consumption,
high-performance, I/O flexibility as well as low-cost,
these devices have the versatility to suit a wide range of
application possibilities such as deluxe feature phone,
cordless phones, fax and answering machines, etc.
The device is best suited for phone products that com-
ply with versatile dialer specification requirements for
different areas or countries. The device is fully sup-
ported by the Holtek range of fully functional develop-
ment and programming tools, providing a means for fast
and efficient product development cycles.
Rev. 1.10
1 February 18, 2009
1 page  
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HT95R34
Symbol
Parameter
Test Conditions
VDD Conditions
Min. Typ.
DTMF Generator (Operating Temperature: -20°C to 85°C
VTDC
DTMF Output DC Level
¾
¾ 0.45VDD ¾
VTOL
DTMF Sink Current
¾ VDTMF= 0.5V
0.1 ¾
DTMF Receiver
RIN Input Impedance (VP, VN) 5V
¾
¾ 10
IOL3 Sink Current (EST)
5V VOUT= 0.5V
1 2.5
IOH3 Source Current (EST)
5V VOUT= 4.5V
-0.4 -0.8
Low-voltage Reset
VLVR1
Low Voltage Reset 1
¾ Configuration option= 4.2V 3.98 4.2
VLVR2
Low Voltage Reset 2
¾ Configuration option= 3.15V 2.98 3.15
VLVR3
Low Voltage Reset 3
¾ Configuration option= 2.1V 1.98 2.1
Max.
0.7VDD
¾
¾
¾
¾
4.42
3.32
2.22
Unit
V
mA
MW
mA
mA
V
V
V
A.C. Characteristics
Ta=25°C
Symbol
General
Parameter
Test Conditions
VDD Conditions
Min.
fSYS1
System Clock 1
¾
Normal mode
32768Hz crystal oscillator
¾
fSYS2
System Clock 2
¾
Green mode
32768Hz crystal oscillator
¾
tSST
System Start-up Timer Period
¾
Power-up, Reset or wake-up
from HALT
¾
tLVR Low Voltage Width to Reset ¾
¾
¾
tWAKE
Wake-up Time for 32768Hz
Crystal OSC
3V 32kHz oscillator OFF ® ON
¾
Settling Time for 32768Hz to
32kHz oscillator is ON;
tFUP 3.58MHz PLL (Frequency Up 3V 3.58MHz oscillator OFF ® ¾
Conversion)
ON
tS2G
Time from Sleep Mode to
Green Mode
¾
Wake-up from Sleep Mode
¾
MCU
tWDTOSC Watchdog Oscillator Period
3V
5V
¾
¾
45
32
tRES
External Reset Low Pulse
Width
¾
¾
1
tINT Interrupt Pulse Width
¾
¾
1
Typ.
3.5795
32
1024
1
¾
¾
0
90
65
¾
¾
Max.
¾
¾
¾
¾
200
20
¾
180
130
¾
¾
Unit
MHz
kHz
tSYS
ms
ms
ms
ms
ms
ms
ms
Rev. 1.10
5 February 18, 2009
5 Page 
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HT95R34
Look-up Table
Any location within the Program Memory can be defined
as a look-up table where programmers can store fixed
data. To use the look-up table, the table pointer must
first be setup by placing the lower order address of the
look up data to be retrieved in the table pointer register, .
This register defines the lower 8-bit address of the
look-up table.
After setting up the table pointer, the table data can be
retrieved from the current Program Memory page or last
Program Memory page using the ²TABRDC[m]² or
²TABRDL [m]² instructions, respectively. When these in-
structions are executed, the lower order table byte from
the Program Memory will be transferred to the user de-
fined Data Memory register [m] as specified in the in-
struction. The higher order table data byte from the
Program Memory will be transferred to the TBLH special
register. Any unused bits in this transferred higher order
byte will have uncertain values.
The following diagram illustrates the addressing/data
flow of the look-up table:
P ro g ra m C o u n te r
H ig h B y te
TB LP
P ro g ra m
M e m o ry
TB LH
H ig h B y te o f T a b le C o n te n ts
S p e c ifie d b y [m ]
L o w B y te o f T a b le C o n te n ts
Look-up Table
Table Program Example
The following example shows how the table pointer and
table data is defined and retrieved from the device. This
example uses raw table data located in the last page
which is stored there using the ORG statement. The
value at this ORG statement is ²1F00H² which refers to
the start address of the last page within the 8K Program
Memory of the microcontroller. The table pointer is setup
here to have an initial value of ²06H². This will ensure
that the first data read from the data table will be at the
Program Memory address ²1F06H² or 6 locations after
the start of the last page. Note that the value for the table
pointer is referenced to the first address of the present
page if the ²TABRDC [m]² instruction is being used. The
high byte of the table data which in this case is equal to
zero will be transferred to the TBLH register automati-
cally when the ²TABRDL [m]² instruction is executed.
Because the TBLH register is a read-only register and
cannot be restored, care should be taken to ensure its
protection if both the main routine and Interrupt Service
Routine use table read instructions. If using the table
read instructions, the Interrupt Service Routines may
change the value of the TBLH and subsequently cause
errors if used again by the main routine. As a rule it is
recommended that simultaneous use of the table read
instructions should be avoided. However, in situations
where simultaneous use cannot be avoided, the inter-
rupts should be disabled prior to the execution of any
main routine table-read instructions. Note that all table
related instructions require two instruction cycles to
complete their operation.
Table Location Bits
Instruction
b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
TABRDC [m] PC12 PC11 PC10 PC9 PC8 @7 @6 @5 @4 @3 @2 @1 @0
TABRDL [m] 1 1 1 1 1 @7 @6 @5 @4 @3 @2 @1 @0
Table Location
Note: PC12~PC8: Current Program Counter bits
@7~@0: Table Pointer Lower-order bits (TBLP)
Rev. 1.10
11 February 18, 2009
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet HT95R34.PDF ] | |
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