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PDF AT91SAM9G20 Data sheet ( Hoja de datos )

Número de pieza AT91SAM9G20
Descripción AT91 ARM Thumb Microcontrollers
Fabricantes ATMEL Corporation 
Logotipo ATMEL Corporation Logotipo



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Features
Incorporates the ARM926EJ-SARM® Thumb® Processor
– DSP Instruction Extensions, ARM Jazelle® Technology for Java® Acceleration
– 32-KByte Data Cache, 32-KByte Instruction Cache, Write Buffer
– CPU Frequency 400 MHz
– Memory Management Unit
– EmbeddedICE, Debug Communication Channel Support
Additional Embedded Memories
– One 64-KByte Internal ROM, Single-cycle Access at Maximum Matrix Speed
– Two 16-KByte Internal SRAM, Single-cycle Access at Maximum Matrix Speed
External Bus Interface (EBI)
– Supports SDRAM, Static Memory, ECC-enabled NAND Flash and CompactFlash®
USB 2.0 Full Speed (12 Mbits per second) Device Port
– On-chip Transceiver, 2,432-byte Configurable Integrated DPRAM
USB 2.0 Full Speed (12 Mbits per second) Host and Double Port
– Single or Dual On-chip Transceivers
– Integrated FIFOs and Dedicated DMA Channels
Ethernet MAC 10/100 Base T
– Media Independent Interface or Reduced Media Independent Interface
– 128-byte FIFOs and Dedicated DMA Channels for Receive and Transmit
Image Sensor Interface
– ITU-R BT. 601/656 External Interface, Programmable Frame Capture Rate
– 12-bit Data Interface for Support of High Sensibility Sensors
– SAV and EAV Synchronization, Preview Path with Scaler, YCbCr Format
Bus Matrix
– Six 32-bit-layer Matrix
– Boot Mode Select Option, Remap Command
Fully-featured System Controller, including
– Reset Controller, Shutdown Controller
– Four 32-bit Battery Backup Registers for a Total of 16 Bytes
– Clock Generator and Power Management Controller
– Advanced Interrupt Controller and Debug Unit
– Periodic Interval Timer, Watchdog Timer and Real-time Timer
Reset Controller (RSTC)
– Based on a Power-on Reset Cell, Reset Source Identification and Reset Output
Control
Clock Generator (CKGR)
– Selectable 32,768 Hz Low-power Oscillator or Internal Low Power RC Oscillator on
Battery Backup Power Supply, Providing a Permanent Slow Clock
– 3 to 20 MHz On-chip Oscillator, One up to 800 MHz PLL and One up to 100 MHz PLL
Power Management Controller (PMC)
– Very Slow Clock Operating Mode, Software Programmable Power Optimization
Capabilities
– Two Programmable External Clock Signals
Advanced Interrupt Controller (AIC)
– Individually Maskable, Eight-level Priority, Vectored Interrupt Sources
– Three External Interrupt Sources and One Fast Interrupt Source, Spurious
Interrupt Protected
Debug Unit (DBGU)
– 2-wire UART and Support for Debug Communication Channel, Programmable ICE
Access Prevention
– Mode for General Purpose 2-wire UART Serial Communication
AT91 ARM
Thumb
Microcontrollers
AT91SAM9G20
Summary
NOTE: This is a summary document.
The complete document is available on
the Atmel website at www.atmel.com.
6384BS–ATARM–15-Dec-08

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AT91SAM9G20 pdf
AT91SAM9G20 Summary
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3. Signal Description
Table 3-1. Signal Description List (Continued)
Signal Name
VDDIOM
VDDIOP
VDDBU
VDDANA
VDDPLL
VDDOSC
VDDCORE
VDDUSB
GND
GNDANA
GNDBU
GNDUSB
XIN
XOUT
XIN32
XOUT32
OSCSEL
PCK0 - PCK1
SHDN
WKUP
NTRST
TCK
TDI
TDO
TMS
JTAGSEL
RTCK
Function
Type
Power Supplies
EBI I/O Lines Power Supply
Power
Peripherals I/O Lines Power Supply
Power
Backup I/O Lines Power Supply
Power
Analog Power Supply
Power
PLL Power Supply
Power
Oscillator Power Supply
Power
Core Chip Power Supply
Power
USB Power Supply
Power
Ground
Ground
Analog Ground
Ground
Backup Ground
Ground
USB Ground
Ground
Clocks, Oscillators and PLLs
Main Oscillator Input
Input
Main Oscillator Output
Output
Slow Clock Oscillator Input
Input
Slow Clock Oscillator Output
Output
Slow Clock Oscillator Selection
Input
Programmable Clock Output
Output
Shutdown, Wakeup Logic
Shutdown Control
Output
Wake-up Input
Input
Test Reset Signal
Test Clock
Test Data In
Test Data Out
Test Mode Select
ICE and JTAG
Input
Input
Input
Output
Input
JTAG Selection
Input
Return Test Clock
Output
Active
Level
Comments
1.65V to 1.95V or 3.0V to 3.6V
1.65V to 3.6V
0.9V to 1.1V
3.0V to 3.6V
0.9V to 1.1V
1.65V to 3.6V
0.9V to 1.1V
1.65V to 3.6V
Accepts between 0V and
VDDBU.
Accepts between 0V and
VDDBU.
Low Pull-up resistor
No pull-up resistor
No pull-up resistor
No pull-up resistor
Pull-down resistor. Accepts
between 0V and VDDBU.
6384BS–ATARM–15-Dec-08
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5. Power Considerations
AT91SAM9G20 Summary
5.1 Power Supplies
The AT91SAM9G20 has several types of power supply pins:
• VDDCORE pins: Power the core, including the processor, the embedded memories and the
peripherals; voltage ranges from 0.9V to 1.1V, 1.0V nominal.
• VDDIOM pins: Power the External Bus Interface I/O lines; voltage ranges between 1.65V and
1.95V (1.8V typical) or between 3.0V and 3.6V (3.3V nominal). The voltage range is
selectable by software.
• VDDIOP pins: Power the Peripherals I/O lines; voltage ranges from 1.65V to 3.6V.
• VDDBU pin: Powers the Slow Clock oscillator, the internal RC oscillator and a part of the
System Controller; voltage ranges from 0.9V to 1.1V, 1.0V nominal.
• VDDPLL pin: Powers the PLL cells; voltage ranges from 0.9V to 1.1V.
• VDDOSC pin: Powers the Main Oscillator cells; voltage ranges from 1.65V to 3.6V
• VDDANA pin: Powers the Analog to Digital Converter; voltage ranges from 3.0V to 3.6V, 3.3V
nominal.
• VDDUSB pin: Powers USB transceiver; voltage ranges from 3.0V to 3.6V.
Ground pins GND are common to VDDCORE, VDDIOM, VDDOSC and VDDIOP pins power
supplies. Separated ground pins are provided for VDDBU, VDDPLL, VDDUSB and VDDANA.
These ground pins are respectively GNDBU, GNDPLL, GNDUSB and GNDANA.
5.2 Power Consumption
The AT91SAM9G20 consumes about 4 mA of static current on VDDCORE at 25°C. This static
current rises at up to 18 mA if the temperature increases to 85°C.
On VDDBU, the current does not exceed 9 µA at 25°C. This static current rises at up to 18 µA if
the temperature increases to 85°C.
For dynamic power consumption, the AT91SAM9G20 consumes a maximum of 50 mA on
VDDCORE at maximum conditions (1.0V, 25°C, rises to 80mA at 85°C, processor running full-
performance algorithm out of high-speed memories).
5.3 Programmable I/O Lines
The power supplies pins VDDIOM accept two voltage ranges. This allows the device to reach its
maximum speed either out of 1.8V or 3.3V external memories.
The maximum speed is 133 MHz on the pin SDCK (SDRAM Clock) loaded with 10 pF. The other
signals (control, address and data signals) do not go over 66 MHz, loaded with 30 pF for power
supply at 1.8V and 50 pF for power supply at 3.3V.
The EBI I/Os accept two slew rate modes, Fast and Slow. This allows to adapt the rising and fall-
ing time on SDRAM clock, control and data to the bus load.
The voltage ranges and the slew rates are determined by programming VDDIOMSEL and IOSR
bits in the Chip Configuration registers located in the Matrix User Interface.
At reset, the selected voltage defaults to 3.3V nominal and power supply pins can accept either
1.8V or 3.3V. The user must make sure to program the EBI voltage range before getting the
device out of its Slow Clock Mode.
6384BS–ATARM–15-Dec-08
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