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PDF LT3750 Data sheet ( Hoja de datos )

Número de pieza LT3750
Descripción Capacitor Charger Controller
Fabricantes Linear Technology 
Logotipo Linear Technology Logotipo



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No Preview Available ! LT3750 Hoja de datos, Descripción, Manual

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FEATURES
Charges Any Size Capacitor
Easily Adjustable Output Voltage
Drives High Current NMOS FETs
Primary-Side Sense—No Output Voltage Divider
Necessary
Wide Input Range: 3V to 24V
Drives Gate to VCC – 2V
Available in 10-Lead MS Package
U
APPLICATIO S
Emergency Warning Beacons
Professional Photoflash Systems
Security/Inventory Control Systems
High Voltage Power Supply
Electric Fences
Detonators
LT3750
Capacitor Charger
Controller
DESCRIPTIO
The LT®3750 is a flyback converter designed to rapidly
charge large capacitors to a user-adjustable target volt-
age. A patented boundary mode control scheme* mini-
mizes transition losses and reduces transformer size. The
transformer turns ratio and two external resistors easily
adjust the output voltage.* A low 78mV current sense
accurately limits peak switch current and also helps to
maximize efficiency. With a wide input voltage range, the
LT3750 can operate from a variety of power sources. A
typical application can charge a 100µF capacitor to 300V
in less than 300ms.
The CHARGE pin gives full control of the LT3750 to the
user. The DONE pin indicates when the capacitor has
reached its programmed value and the part has stopped
charging.
, LTC and LT are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
*Protected by U.S. Patents, including 6518733, 6636021.
TYPICAL APPLICATIO
300V, 6A Capacitor Charger
VTRANS
VCC
12V
10µF
10µF
VCC
100k
VTRANS
RVOUT
DONE
RDCM
LT3750
OFF ON CHARGE
GATE
T1 D1
1:10
56µF
×2
+
60.4k
43k
M1
VOUT
300V
100µF
SOURCE
GND RBG
2.49k
12m
100pF
3750 TA01a
6A Charge Time
300
VTRANS = 18V
250
200
VTRANS = 6V
VTRANS = 12V
150
100
50
0
0 0.1 0.2 0.3 0.4 0.5
TIME (SECONDS)
3750 TA03c
3750fa
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LT3750 pdf
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BLOCK DIAGRA
RDONE
2
DONE
VCC
2.8V + UVLO
VCC
VTRANS
UVLO
2.5V +
VTRANS
DIE
TEMP
+
160°C
M1
ENABLE
QQ
SR
TSD
CHARGE
3
ONE
SHOT
LT3750
VTRANS
1
VTRANS
DCM
COMPARATOR
ONE
SHOT
S
RQ
T1
1:N
D1
+
VOUT
RVOUT
RVOUT
9
COUT
+
RDCM
RDCM
8
– + – VTRANS
36mV
VCC
4
GATE
7
VDRAIN
M1
+
VOUT
COMPARATOR
1.24V
GND RBG
5 10
RBG
CURRENT LIMIT
COMPARATOR
+
SOURCE
6
+– 78mV
RSENSE
3750 BD
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LT3750 arduino
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LT3750
APPLICATIO S I FOR ATIO
Board Layout
The high voltage operation of the the LT3750 demands
careful attention to board layout. Observe the following
points:
1. Minimize the area of the high voltage end of the second-
ary winding.
2. Provide sufficient spacing for all high voltage nodes
(NMOS drain, VOUT and the secondary winding of the
transformer) in order to meet breakdown voltage
requirements.
3. Keep the electrical path formed by C1, the primary of T1
and drain of the NMOS as small as possible. Increasing
the size of this path effectively increases the leakage
inductance of T1 resulting in an overvoltage condition
on the drain of the NMOS.
VTRANS
RDONE
CHARGE
VCC
CTRANS
RBG
1
2
3
4
5
CIN
LT3750
10
9
8
7
6
RSENSE
CPRI
DOUT
T1
1:N
RDCM
RVOUT
+
COUT
M1
Figure 4. Recommended Board Layout
(Not to Scale)
3750 F04
3750fa
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