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PDF PTN3360A Data sheet ( Hoja de datos )
| Número de pieza | PTN3360A | |
| Descripción | Enhanced Performance HDMI/DVI Level Shifter | |
| Fabricantes | NXP Semiconductors | |
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PTN3360A
Enhanced performance HDMI/DVI level shifter with inverting
HPD
Rev. 01 — 4 May 2009
Product data sheet
1. General description
The PTN3360A is a high-speed level shifter device which converts four lanes of low-swing
AC-coupled differential input signals to DVI v1.0 and HDMI v1.3a compliant open-drain
current-steering differential output signals, up to 2.5 Gbit/s per lane. Each of these lanes
provides a level-shifting differential buffer to translate from low-swing AC-coupled
differential signaling on the source side, to TMDS-type DC-coupled differential
current-mode signaling terminated into 50 Ω to 3.3 V on the sink side. Additionally, the
PTN3360A provides a single-ended active buffer for voltage translation of the HPD signal
from 5 V on the sink side to 1.1 V on the source side and provides a channel for level
shifting of the DDC channel (consisting of a clock and a data line) between 3.3 V
source-side and 5 V sink-side. The DDC channel is implemented using pass-gate
technology providing level shifting as well as disablement (isolation between source and
sink) of the clock and data lines.
The low-swing AC-coupled differential input signals to the PTN3360A typically come from
a display source with multi-mode I/O, which supports multiple display standards, e.g.,
DisplayPort, HDMI and DVI. While the input differential signals are configured to carry DVI
or HDMI coded data, they do not comply with the electrical requirements of the DVI v1.0 or
HDMI v1.3a specification. By using PTN3360A, chip set vendors are able to implement
such reconfigurable I/Os on multi-mode display source devices, allowing the support of
multiple display standards while keeping the number of chip set I/O pins low. See
Figure 1.
The PTN3360A main high-speed differential lanes feature low-swing self-biasing
differential inputs which are compliant to the electrical specifications of DisplayPort
Standard v1.1 and/or PCI Express Standard v1.1, and open-drain current-steering
differential outputs compliant to DVI v1.0 and HDMI v1.3a electrical specifications.The
I2C-bus channel level-translates the DDC signals between 3.3 V (source) and 5.0 V (sink).
The PTN3360A is a fully featured HDMI as well as DVI level shifter. It is functionally
equivalent to PTN3300A but provides higher speed performance and higher ESD
robustness. The PTN3360A is also equivalent to PTN3360B with the exception that
PTN3360A provides inverting level shifting on the HPD channel.
PTN3360A is powered from a single 3.3 V power supply consuming a small amount of
power (120 mW typ.) and is offered in a 48-terminal HVQFN48 package.
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5. Pinning information
5.1 Pinning
PTN3360A
Enhanced HDMI/DVI level shifter with inverting 1.1 V HPD
terminal 1
index area
GND 1
VDD 2
n.c. 3
n.c. 4
GND 5
REXT 6
HPD_SOURCE_N 7
SDA_SOURCE 8
SCL_SOURCE 9
n.c. 10
VDD 11
GND 12
PTN3360ABS
36 GND
35 n.c.
34 n.c.
33 VDD
32 DDC_EN
31 GND
30 HPD_SINK
29 SDA_SINK
28 SCL_SINK
27 GND
26 VDD
25 OE_N
002aae206
Transparent top view
Fig 3.
HVQFN48 package supply ground is connected to both GND pins and exposed center pad. GND
pins must be connected to supply ground for proper device operation. For enhanced thermal,
electrical, and board level performance, the exposed pad needs to be soldered to the board using
a corresponding thermal pad on the board and for proper heat conduction through the board,
thermal vias need to be incorporated in the PCB in the thermal pad region.
Pin configuration for HVQFN48
PTN3360A_1
Product data sheet
Rev. 01 — 4 May 2009
© NXP B.V. 2009. All rights reserved.
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PTN3360A
Enhanced HDMI/DVI level shifter with inverting 1.1 V HPD
6.2 Analog current reference
The REXT pin (pin 6) is an analog current sense port used to provide an accurate current
reference for the differential outputs OUT_Dx. For best output voltage swing accuracy, use
of a 10 kΩ resistor (1 % tolerance) connected between this terminal and GND is
recommended.
If an external 10 kΩ ± 1 % resistor is not used, this pin can be left open-circuit, or
connected to GND or VDD, either directly (0 Ω) or using pull-up or pull-down resistors of
value less than 10 kΩ. In any of these cases, the output will function normally but at
reduced accuracy over voltage and temperature of the following parameters: output levels
(VOL), differential output voltage swing, and rise and fall time accuracy.
6.3 Backdrive current protection
The PTN3360A is designed for backdrive prevention on all sink-side TMDS outputs,
sink-side DDC I/Os and the HPD_SINK input. This supports user scenarios where the
display is connected and powered, but the PTN3360A is unpowered. In these cases, the
PTN3360A will sink no more than a negligible amount of leakage current, and will block
the display (sink) termination network from driving the power supply of the PTN3360A or
that of the inactive DVI or HDMI source.
PTN3360A_1
Product data sheet
Rev. 01 — 4 May 2009
© NXP B.V. 2009. All rights reserved.
11 of 21
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| Páginas | Total 21 Páginas | |
| PDF Descargar | [ Datasheet PTN3360A.PDF ] | |
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