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PDF LTC3835-1 Data sheet ( Hoja de datos )
| Número de pieza | LTC3835-1 | |
| Descripción | Low IQ Synchronous Step-Down Controller | |
| Fabricantes | Linear Technology | |
| Logotipo |  |
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FEATURES
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n Wide Output Voltage Range: 0.8V ≤ VOUT ≤ 10V
n Low Operating IQ: 80μA
n OPTI-LOOP® Compensation Minimizes COUT
n ±1% Output Voltage Accuracy
n Wide VIN Range: 4V to 36V Operation
n Phase-Lockable Fixed Frequency 140kHz to 650kHz
n Dual N-Channel MOSFET Synchronous Drive
n Very Low Dropout Operation: 99% Duty Cycle
n Adjustable Output Voltage Soft-Start or Tracking
n Output Current Foldback Limiting
n Output Overvoltage Protection
n Low Shutdown IQ: 10μA
n Selectable Continuous, Pulse-Skipping or
Burst Mode® Operation at Light Loads
n Small 16-Lead Narrow SSOP or 3mm × 5mm
DFN Package
APPLICATIONS
n Automotive Systems
n Telecom Systems
n Battery-Operated Digital Devices
n Distributed DC Power Systems
LTC3835-1
Low IQ Synchronous
Step-Down Controller
DESCRIPTION
The LTC®3835-1 is a high performance step-down switch-
ing regulator controller that drives an all N-channel synchro-
nous power MOSFET stage. A constant-frequency current
mode architecture allows a phase-lockable frequency of
up to 650kHz.
The 80μA no-load quiescent current extends operating
life in battery powered systems. OPTI-LOOP compensa-
tion allows the transient response to be optimized over
a wide range of output capacitance and ESR values. The
LTC3835-1 features a precision 0.8V reference and a power
good output indicator. The 4V to 36V input supply range
encompasses a wide range of battery chemistries.
The TRACK/SS pin ramps the output voltage during start-
up. Current foldback limits MOSFET heat dissipation during
short-circuit conditions.
Comparison of LTC3835 and LTC3835-1
PART #
LTC3835
CLKOUT/
PHASMD
YES
EXTVCC
YES
PGOOD
YES
PACKAGES
FE20/4 × 5 QFN
LTC3835-1
NO
NO
NO GN16/3 × 5 DFN
L, LT, LTC, LTM, Burst Mode, and OPTI-LOOP are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
Protected by U.S. Patents, including 5408150, 5481178, 5705919, 5929620, 6304066,
6498466, 6580258, 6611131.
TYPICAL APPLICATION
High Efficiency Step-Down Converter
0.01μF
330pF
33k
20k
62.5k
PLLLPF
VIN
RUN TG
TRACK/SS
BOOST
ITH
LTC3835-1
SW
100pF
SGND
PLLIN/MODE
VFB
SENSE–
SENSE+
INTVCC
BG
PGND
0.22μF
10μF
3.3μH 0.012Ω
4.7μF
VIN
4V TO 36V
VOUT
3.3V
5A
150μF
38351 TA01
Efficiency and Power Loss
vs Load Current
100 VIN = 12V; VOUT = 3.3V
90
EFFICIENCY
80
70
60
50
100000
10000
1000
100
40
POWER LOSS 10
30
20 1
10
0
0.001 0.01
0.1 1 10 100
LOAD CURRENT (mA)
0.1
1000 10000
38351 TA01b
38351fc
1
1 page  
LTC3835-1
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, unless otherwise noted.
Inductor Current at Light Load
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FORCED
CONTIN-
UOUS
MODE
2A/DIV
Burst Mode
OPERATION
PULSE-
SKIPPING
MODE
4μs/DIV
FIGURE 10 CIRCUIT
VOUT = 3.3V
ILOAD = 300μA
38351 G07
Soft Start-Up
VOUT
1V/DIV
20ms/DIV
FIGURE 10 CIRCUIT
38351 G08
Tracking Start-Up
VOUT2
2V/DIV
(MASTER)
VOUT1
2V/DIV
(SLAVE)
20ms/DIV
FIGURE 10 CIRCUIT
38351 G09
Total Input Supply Current
vs Input Voltage
350
300
250
300μA LOAD
200
150
100 NO LOAD
50
0
5 10
15 20
25 30 35
INPUT VOLTAGE (V)
38351 G10
EXTVCC Switchover and INTVCC
Voltages vs Temperature
6.0
5.8
5.6
5.4 INTVCC
5.2
5.0
4.8 EXTVCC RISING
4.6
4.4 EXTVCC FALLING
4.2
4.0
–45 –25 –5 15 35 55 75 95
TEMPERATURE (°C)
38351 G11
INTVCC Line Regulation
5.50
5.45
5.40
5.35
5.30
5.25
5.20
5.15
5.10
5.05
5.00
0 5 10 15 20 25 30
INPUT VOLTAGE (V)
35 40
38351 G12
Maximum Current Sense Voltage
vs ITH Voltage
100
PULSE SKIPPING
FORCED CONTINUOUS
80 BURST MODE (RISING)
BURST MODE (FALLING)
60
40
20
0
–20
10% DUTY CYCLE
–40
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4
ITH PIN VOLTAGE (V)
38351 G13
Sense Pins Total Input
Bias Current
200
100
0
–100
–200
–300
–400
–500
–600
–700
0
1 2 3 4 5 6 7 8 9 10
VSENSE COMMON MODE VOLTAGE (V)
38351 G14
Maximum Current Sense Threshold
vs Duty Cycle
120
100
80
60
40
20
0
0 10 20 30 40 50 60 70 80 90 100
DUTY CYCLE (%)
38351 G15
38351fc
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5 Page 
LTC3835-1
OPERATION (Refer to Functional Diagram)
The typical capture range of the LTC3835-1’s phase-
locked loop is from approximately 115kHz to 800kHz,
wwww.diatthasahegetu4aur.caonmtee to be between 140kHz and 650kHz. In
other words, the LTC3835-1’s PLL is guaranteed to lock
to an external clock source whose frequency is between
140kHz and 650kHz.
The typical input clock thresholds on the PLLIN/MODE
pin are 1.6V (rising) and 1.2V (falling).
Output Overvoltage Protection
An overvoltage comparator guards against transient over-
shoots as well as other more serious conditions that may
overvoltage the output. When the VFB pin rises to more
than 10% higher than its regulation point of 0.800V, the top
MOSFET is turned off and the bottom MOSFET is turned
on until the overvoltage condition is cleared.
APPLICATIONS INFORMATION
RSENSE Selection for Output Current
RSENSE is chosen based on the required output current.
The current comparator has a maximum threshold of
100mV/RSENSE and an input common mode range of
SGND to 10V. The current comparator threshold sets the
peak of the inductor current, yielding a maximum average
output current IMAX equal to the peak value less half the
peak-to-peak ripple current, ΔIL.
Allowing a margin for variations in the IC and external
component values yields:
RSENSE
=
80mV
IMAX
When using the controller in very low dropout conditions,
the maximum output current level will be reduced due to the
internal compensation required to meet stability criterion
for buck regulators operating at greater than 50% duty
factor. A curve is provided to estimate this reduction in
peak output current level depending upon the operating
duty factor.
Operating Frequency and Synchronization
The choice of operating frequency, is a trade-off between
efficiency and component size. Low frequency operation
improves efficiency by reducing MOSFET switching losses,
both gate charge loss and transition loss. However, lower
frequency operation requires more inductance for a given
amount of ripple current.
The internal oscillator of the LTC3835-1 runs at a nominal
400kHz frequency when the PLLLPF pin is left floating
and the PLLIN/MODE pin is a DC low or high. Pulling the
PLLLPF to INTVCC selects 530kHz operation; pulling the
PLLLPF to SGND selects 250kHz operation.
Alternatively, the LTC3835-1 will phase-lock to a clock
signal applied to the PLLIN/MODE pin with a frequency
between 140kHz and 650kHz (see Phase-Locked Loop
and Frequency Synchronization).
Inductor Value Calculation
The operating frequency and inductor selection are inter-
related in that higher operating frequencies allow the use
of smaller inductor and capacitor values. So why would
anyone ever choose to operate at lower frequencies with
larger components? The answer is efficiency. A higher
frequency generally results in lower efficiency because
of MOSFET gate charge losses. In addition to this basic
trade-off, the effect of inductor value on ripple current and
low current operation must also be considered.
The inductor value has a direct effect on ripple current.
The inductor ripple current ΔIL decreases with higher
inductance or frequency and increases with higher VIN:
( )( )ΔIL =
1
fL
VOUT
⎛
⎝⎜ 1–
VOUT
VIN
⎞
⎠⎟
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11 Page | ||
| Páginas | Total 28 Páginas | |
| PDF Descargar | [ Datasheet LTC3835-1.PDF ] | |
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