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PDF LTC3826-1 Data sheet ( Hoja de datos )
| Número de pieza | LTC3826-1 | |
| Descripción | 2-Phase Synchronous Step-Down Controller | |
| Fabricantes | Linear Technology | |
| Logotipo |  |
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LTC3826-1
30µA IQ, Dual, 2-Phase
Synchronous Step-Down Controller
FEATURES
DESCRIPTION
wwwn.daWtasihdeeet4Ouu.ctopmut Voltage Range: 0.8V ≤ VOUT ≤ 10V
n Low Operating IQ: 30μA (One Channel On)
n Out-of-Phase Controllers Reduce Required Input
Capacitance and Power Supply Induced Noise
n OPTI-LOOP® Compensation Minimizes COUT
n ±1% Output Voltage Accuracy
n Wide VIN Range: 4V to 36V Operation
n Phase-Lockable Fixed Frequency 140kHz to 650kHz
n Selectable Continuous, Pulse Skipping or Low Ripple
Burst Mode® Operation at Light Loads
n Dual N-Channel MOSFET Synchronous Drive
n Very Low Dropout Operation: 99% Duty Cycle
n Adjustable Output Voltage Soft-Start or Tracking
n Output Current Foldback Limiting
n Power Good Output Voltage Monitor
n Output Overvoltage Protection
n Low Shutdown IQ: 4μA
n Internal LDO Powers Gate Drive from VIN or VOUT
n Small 28-Lead SSOP Package
APPLICATIONS
n Automotive Systems
n Battery-Operated Digital Devices
n Distributed DC Power Systems
The LTC®3826-1 is a high performance dual step-down
switching regulator controller that drives all N-channel
synchronous power MOSFET stages. A constant frequency
current mode architecture allows a phase-lockable fre-
quency of up to 650kHz. Power loss and noise due to the
ESR of the input capacitor ESR are minimized by operating
the two controller output stages out of phase.
The 30μA no-load quiescent current extends operating
life in battery powered systems. OPTI-LOOP compensa-
tion allows the transient response to be optimized over
a wide range of output capacitance and ESR values. The
LTC3826-1 features a precision 0.8V reference and a power
good output indicator. A wide 4V to 36V input supply range
encompasses all battery chemistries.
Independent TRACK/SS pins for each controller ramp the
output voltage during start-up. Current foldback limits
MOSFET heat dissipation during short-circuit conditions.
The PLLIN/MODE pin selects among Burst Mode opera-
tion, pulse skipping mode, or continuous inductor cur-
rent mode at light loads. For a leadless package version
(5mm × 5mm QFN) with additional features, see the
LTC3826 data sheet.
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
Burst Mode and OPTI-LOOP are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners. Protected by U.S. Patents
including 5481178, 5929620, 6177787, 6144194, 5408150, 6580258, 6304066, 5705919.
TYPICAL APPLICATION
VOUT1
3.3V
5A
3.3μH
0.015Ω
62.5k
150μF
High Efficiency Dual 8.5V/3.3V Step-Down Converter
0.1μF
VIN
TG1
INTVCC
TG2
BOOST1
BOOST2
SW1 SW2
BG1 BG2
LTC3826-1
PGND
SENSE1+
SENSE2+
SENSE1–
SENSE2–
VFB1
VFB2
ITH1 ITH2
20k 220pF TRACK/SS1 SGND TRACK/SS2
15k 0.1μF
0.1μF
4.7μF
0.1μF
220pF
15k
22μF
50V
VIN
4V TO 36V
7.2μH
0.015Ω
192.5k
20k
VOUT2
8.5V
3.5A
150μF
38261 TA01
Efficiency and Power Loss
vs Load Current
100 10000
90
80 1000
70
60 100
50
40 10
30
20 1
10
0
0.00001 0.0001 0.001
FIGURE 13 CIRCUIT
0.1
0.01 0.1 1 10
OUTPUT CURRENT (A)
38261 TA01b
38261fb
1
1 page  
TYPICAL PERFORMANCE CHARACTERISTICS
Inductor Current at Light Load
www.datasheet4u.com
FORCED
CONTINUOUS
MODE
2A/DIV
Burst Mode
OPERATION
PULSE
SKIPPING
MODE
2μs/DIV
FIGURE 13 CIRCUIT
VOUT = 3.3V
ILOAD = 100μA
38261 G07
Soft Start-Up
VOUT2
2V/DIV
VOUT1
2V/DIV
20ms/DIV
FIGURE 13 CIRCUIT
38261 G08
LTC3826-1
Tracking Start-Up
VOUT2
2V/DIV
VOUT1
2V/DIV
20ms/DIV
FIGURE 13 CIRCUIT
38261 G09
Total Input Supply Current
vs Input Voltage
350
300
250
200
150 300μA LOAD
100
50 NO LOAD
0
5 10 15 20 25
INPUT VOLTAGE (V)
FIGURE 13 CIRCUIT
30 35
38261 G10
Maximum Current Sense Voltage
vs ITH Voltage
100
PULSE SKIPPING
FORCED CONTINUOUS
80 Burst Mode OPERATION
(RISING)
60 Burst Mode OPERATION
(FALLING)
40
20
0
–20
10% DUTY CYCLE
–40
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4
ITH PIN VOLTAGE (V)
38261 G13
EXTVCC Switchover and INTVCC
Voltages vs Temperature
6.0
5.8
5.6
5.4 INTVCC
5.2
5.0
4.8 EXTVCC RISING
4.6
4.4 EXTVCC FALLING
4.2
4.0
–45 –25 –5 15 35 55 75 95
TEMPERATURE (°C)
38261 G11
Sense Pins Total Input
Bias Current
60
30
0
–30
–60
–90
–120
–150
–180
–210
–240
–270
–300
0 1 2 3 4 5 6 7 8 9 10
VSENSE COMMON MODE VOLTAGE (V)
38261 G14
INTVCC Line Regulation
5.5
5.4
5.3
5.2
5.1
5.0
0
5 10 15 20 25 30 35 40
INPUT VOLTAGE (V)
38261 G12
Maximum Current Sense
Threshold vs Duty Cycle
120
100
80
60
40
20
0
0 10 20 30 40 50 60 70 80 90 100
DUTY CYCLE (%)
38261 G15
38261fb
5
5 Page 
LTC3826-1
OPERATION (Refer to Functional Diagram)
MOSFETs are turned off. The ITH pin is then disconnected
from the output of the EA and “parked” at 0.425V.
wwwI.dnastalesheepetm4uo.cdoem, much of the internal circuitry is turned off,
reducing the quiescent current that the LTC3826-1 draws.
If one channel is shut down and the other channel is in
sleep mode, the LTC3826-1 draws only 30μA of quiescent
current. If both channels are in sleep mode, the LTC3826-1
draws only 50μA of quiescent current. In sleep mode,
the load current is supplied by the output capacitor. As
the output voltage decreases, the EA’s output begins to
rise. When the output voltage drops enough, the ITH pin
is reconnected to the output of the EA, the sleep signal
goes low, and the controller resumes normal operation
by turning on the top external MOSFET on the next cycle
of the internal oscillator.
When a controller is enabled for Burst Mode operation,
the inductor current is not allowed to reverse. The reverse
current comparator (IR) turns off the bottom external
MOSFET just before the inductor current reaches zero,
preventing it from reversing and going negative. Thus, the
controller operates in discontinuous operation.
In forced continuous operation, the inductor current is
allowed to reverse at light loads or under large transient
conditions. The peak inductor current is determined by
the voltage on the ITH pin, just as in normal operation.
In this mode, the efficiency at light loads is lower than
in Burst Mode operation. However, continuous has the
advantages of lower output ripple and less interference
to audio circuitry. In forced continuous mode, the output
ripple is independent of load current.
When the PLLIN/MODE pin is connected for pulse-skip-
ping mode or clocked by an external clock source to
use the phase-locked loop (see Frequency Selection and
Phase-Locked Loop section), the LTC3826-1 operates in
PWM pulse skipping mode at light loads. In this mode,
constant frequency operation is maintained down to ap-
proximately 1% of designed maximum output current.
At very light loads, the current comparator ICMP may
remain tripped for several cycles and force the external top
MOSFET to stay off for the same number of cycles (i.e.,
skipping pulses). The inductor current is not allowed to
reverse (discontinuous operation). This mode, like forced
continuous operation, exhibits low output ripple as well as
low audio noise and reduced RF interference as compared
to Burst Mode operation. It provides higher low current
efficiency than forced continuous mode, but not nearly as
high as Burst Mode operation.
Frequency Selection and Phase-Locked Loop (PLLLPF
and PLLIN/MODE Pins)
The selection of switching frequency is a tradeoff between
efficiency and component size. Low frequency opera-
tion increases efficiency by reducing MOSFET switching
losses, but requires larger inductance and/or capacitance
to maintain low output ripple voltage.
The switching frequency of the LTC3826-1’s controllers
can be selected using the PLLLPF pin.
If the PLLIN/MODE pin is not being driven by an external
clock source, the PLLLPF pin can be floated, tied to INTVCC,
or tied to SGND to select 390kHz, 530kHz, or 250kHz,
respectively.
A phase-locked loop (PLL) is available on the LTC3826-1
to synchronize the internal oscillator to an external clock
source that is connected to the PLLIN/MODE pin. In this
case, a series R-C should be connected between the
PLLLPF pin and SGND to serve as the PLL’s loop filter.
The LTC3826-1 phase detector adjusts the voltage on the
PLLLPF pin to align the turn-on of controller 1’s external
top MOSFET to the rising edge of the synchronizing signal.
Thus, the turn-on of controller 2’s external top MOSFET is
180 degrees out of phase to the rising edge of the external
clock source.
The typical capture range of the LTC3826-1’s phase-locked
loop is from approximately 115kHz to 800kHz, with a
guarantee over all manufacturing variations to be between
140kHz and 650kHz. In other words, the LTC3826-1’s PLL
is guaranteed to lock to an external clock source whose
frequency is between 140kHz and 650kHz.
The typical input clock thresholds on the PLLIN/MODE
pin are 1.6V (rising) and 1.2V (falling).
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| Páginas | Total 32 Páginas | |
| PDF Descargar | [ Datasheet LTC3826-1.PDF ] | |
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