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PDF LTC3811 Data sheet ( Hoja de datos )
| Número de pieza | LTC3811 | |
| Descripción | Multiphase Step-Down DC/DC Controller | |
| Fabricantes | Linear Technology | |
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LTC3811
High Speed Dual,
FEATURESwww.datasheet4u.com
Multiphase Step-Down DC/DC
DESCRIPTION
Controller
■ Fixed Frequency, Peak Current Mode Control
■ ±0.5% Output Accuracy Over Temperature
■ Optimized for Low VOUT Applications (Up to 3.3V)
■ Dual or Single Output, Multiphase Operation
■ Wide VIN Range: 4.5V to 30V Operation
■ High Speed Differential Remote Sense Amplifier
■ Inductor DCR or Sense Resistor Capable
■ Adjustable Peak Current Sense Voltage:
24mV to 85mV
■ Very Low Duty Cycle Operation: tON(MIN) = 65ns (Typ)
■ Powerful Internal Gate Drivers
■ Output Voltage Soft-Start, Tracking and Sequencing
■ Programmable Load Line for Reduced COUT
■ Clock Input and Output for Up to 12-Phase Operation
■ Fixed Frequency Operation from 250kHz to 750kHz
■ PLL Synchronization from 150kHz Up to 900kHz
■ Selectable CCM or DCM Operation
■ Available in 5mm × 7mm QFN and G36 Packages
APPLICATIONS
■ Network Servers
■ High Current ASIC Supplies
■ Low Voltage Power Distribution
The LTC®3811 is a dual, PolyPhase® synchronous step-
down switching regulator controller optimized for output
voltages up to 3.3V. The LTC3811 includes high bandwidth
error amplifiers as well as a high speed differential remote
sense amplifier. The sense voltage range is programmable
from 24mV to 85mV, allowing the use of either the inductor
DCR or a discrete sense resistor. Multiphase operation is
made possible using the MODE/SYNC input, the CLKOUT
output and the PHASEMODE control pin, allowing 1-, 2-,
3-, 4-, 6- or 12-phase operation.
Large internal gate drivers minimize switching losses and
allow the use of multiple power MOSFETs connected in
parallel for high current applications.
The operating frequency of the LTC3811 can be programmed
from 250kHz to 750kHz and can also be synchronized to
an external clock using the internal PLL.
Tracking and sequencing are possible with the LTC3811,
and soft-start is programmed with an external capacitor.
Shutdown reduces supply current to 20μA.
, LT, LTC, LTM and PolyPhase are registered trademarks of Linear Technology
Corporation. All other trademarks are the property of their respective owners.
Protected by U.S. Patents, including 5481178, 6304066, 5929620, 6177787, 6144194,
6580258, 5705919.
TYPICAL APPLICATION
VOUT1
2V
15A
Dual Output, 2-Phase Tracking Core and I/O Supply
VIN
4.5V TO 14V
VIN
TG1
INTVCC DRVCC
TG2
BOOST1
SW1
BG1
BOOST2
SW2
BG2
RUN1
PGND
RUN2
SENSE1+
SENSE1–
RNG1
RNG2
FB1
LTC3811
SENSE2+
SENSE2–
DIFF/IN+
DIFF/IN–
DIFF/OUT
FB2
COMP1
COMP2
SS/TRACK1 SGND SS/TRACK2
VOUT2
1.5V
15A
3811 TA01a
VOUT
100mV/DIV
Load Step
IL
5A/DIV
VIN = 12V
VOUT = 2V
IOUT = 0A to 12.5A
20μs/DIV
3811 TA01b
3811f
1
1 page  
LTC3811
ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating
junction temperature range, otherwise specifications are at TJ = 25°C. VIN = 12V, MODE/SYNC = 0V, unless otherwise specified.
SYMBOL
PARAMETER
DRVCC Linear Regulator
www.datasheet4u.com
VDRVCC
LDO Regulator Output Voltage
ΔVDRVCC(LOAD)
DRVCC Load Regulation
ΔVDRVCC(LINE)
DRVCC Line Regulation
VDRVCC(UVLO)
LDO Regulator Undervoltage Threshold
VDRVCC(HYST)
LDO Regulator Undervoltage Hysteresis
VEXTVCC
EXTVCC Switchover Voltage
VEXTVCC(HYST)
EXTVCC Switchover Hysteresis
VEXTVCC(DROP)
EXTVCC Voltage Drop
Gate Drivers
tr (TG1, TG2)
tf (TG1, TG2)
tr (BG1, BG2)
tf (BG1, BG2)
RDS(ON)(TG)
TG1, TG2
Top Gate Rise Time
Top Gate Fall Time
Bottom Gate Rise Time
Bottom Gate Fall Time
Top Gate Pull-Down NMOS
On-Resistance
RDS(ON)(BG)
BG1, BG2
Bottom Gate Pull-Down NMOS
On-Resistance
IPK(TG) TG1, TG2
IPK(BG) BG1, BG2
tDEAD1
Top Gate (TG) Peak Source Current
Bottom Gate (BG) Peak Source Current
Bottom Gate Off to Top Gate On
Deadtime
tDEAD2
Top Gate Off to Bottom Gate On
Deadtime
tON(MIN)
Minimum On-Time
CONDITIONS
VEXTVCC = 0V
ILOAD = 0mA to 50mA
ΔVIN = 8.5V to 30V
DRVCC Rising
IDRVCC = 20mA, EXTVCC Rising
IDRVCC = 20mA
IDRVCC = 20mA, VEXTVCC = 5V
CL = 3300pF (Note 6)
CL = 3300pF (Note 6)
CL = 3300pF (Note 6)
CL = 3300pF (Note 6)
TG to SW
BG to PGND
(Note 6)
(Note 6)
VCOMP = 1.25V (Note 6, 7)
MIN TYP MAX UNITS
● 5.6
–2.0
6.0
–0.5
0.01
3.7
0.56
4.5
400
100
6.4
0.2
V
%
%/V
V
V
V
mV
mV
20 ns
10 ns
20 ns
10 ns
0.9 Ω
0.9 Ω
1.0 A
1.0 A
30 ns
30 ns
65 ns
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime. Unless otherwise specified, all voltages are relative
to SGND and all currents are positive into a pin.
Note 2: The LTC3811E is guaranteed to meet performance specifications
from 0°C to 85°C temperature. Specifications over the –40°C to
85°C operating junction temperature range are assured by design,
characterization and correlation with statistical process controls.
Note 3: TJ is calculated from the ambient temperature TA and power
dissipation PD according to the following formula:
TJ = TA + (PD • TBD°C/W)
Note 4: The dynamic input supply current is higher due to power
MOSFET gate charging (QG • fOSC). See Applications Information for more
information.
Note 5: The error amplifiers are measured in a feedback loop using an
external servo operational amplifier that drives the VFB pin and regulates
VCOMP to be equal to the external control voltage.
Note 6: Guaranteed by design, not subject to test.
Note 7: The minimum on-time condition corresponds to an inductor peak-
to-peak ripple current of 50% of IMAX. See Applications Information for
more details.
Note 8: The voltage positioning amplifier operates as a transconductance
amplifier, where the input voltages are the SENSE+ to SENSE– potentials
for both channels. The amplifier output current flows through an external
resistor in order to program the amount of voltage droop at full load.
Note 9: The PHASEMODE function is only available in the QFN package.
The 36-lead GW package has a fixed channel 1-to-channel 2 phase
relationship of 180°C and a channel 1-to-CLKOUT phase relationship of
90°C. The version in the 36-lead GW package is therefore optimized for
2- and 4-phase operation.
Note 10: Rise and fall times are measured at 10% and 90% levels.
3811f
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5 Page 
LTC3811
PIN FUNCTIONS
BG1, BG2: High Current Gate Driver Outputs for the
N-Channel Lower Power MOSFETs.
wwwB.dOatOasShTee1t,4uB.cOomOST2: Bootstrapped Supply Inputs to the
Topside Floating Drivers. A low ESR (X5R or better) ceramic
bypass capacitor should be connected between the BOOST
pin and the SW pin as close as possible to the IC.
CLKOUT: A Digital Output Used for Daisy-Chaining Multiple
LTC3811 ICs in Multiphase Systems. The PHASEMODE
pin voltage controls the phase relationship between the
channel 1 TG signal and CLKOUT.
COMP1, COMP2: Error Amplifier Output Voltages. The
error amplifiers in the LTC3811 are high bandwidth, low
offset true operational amplifiers that have low output
impedance. As a result, the outputs of two active error
amplifiers cannot be directly connected together! For
multiphase operation, connecting the FB pin of a slave
error amplifier to INTVCC will disable the output of that
amplifier. Multiphase operation can then be achieved by
connecting all of the COMP pins together and using one
channel as the master and all of the others as slaves. The
FB and COMP pins are also used for compensating the
control loop of the converter.
CSOUT (QFN Only): Output of the Voltage Positioning
gm Amplifier. This pin allows the user to program the
amount of voltage droop in the output voltage at high
load current. The output of the voltage positioning gm
amplifier is a bi-directional current proportional to the
(SENSE+ – SENSE–) voltages for both channels. The
gm is internally fixed to 5mS. Forcing the gm amplifier
output current through a low value external resistor will
program the amount of voltage droop seen at the output.
See Applications Information for more details regarding
voltage positioning.
DIFF/IN+: Remote Sense Differential Amplifier Positive
Input. A low offset, high bandwidth operational amplifier
is configured with four precision 80k resistors for a non-
inverting gain of one. This pin is normally connected to the
positive terminal of the decoupling capacitor at the load.
DIFF/IN–: Remote Sense Differential Amplifier Negative
Input. This pin is normally connected to the negative
terminal of the decoupling capacitor at the remote load.
The DIFF/IN+ and DIFF/IN– PCB traces should be routed
as close as possible and parallel to each other from the
IC to the output capacitor.
DIFF/OUT: Remote Sense Differential Amplifier Output
Voltage, Configured for a Noninverting Gain of One. The
voltage at the DIFF/OUT pin is normally connected through
an external resistor divider to the FB pin of one channel.
The bottom of the divider should be connected to the
SGND pin of the IC.
DRVCC: Output of the Internal 6V Low Dropout Regulator
(LDO), Supply Pin for the Bottom Gate Drivers and Output
of the PMOS EXTVCC Switch. A low ESR (X5R or better)
4.7μF ceramic bypass capacitor should be connected
between the DRVCC pin and the PGND pin, as close as
possible to the IC.
Exposed Pad (QFN Only): The Exposed Pad of the QFN
Leadframe is PGND.
EXTVCC: External Power Supply Input to an Internal PMOS
Power Switch Connected Between EXTVCC (Drain) and
DRVCC (Source). This pin allows an external supply to be
used for the high current gate drivers, thereby reducing
power dissipation in the LDO and increasing efficiency.
When EXTVCC exceeds 4.5V (rising), the high current
PMOS switch turns on and shorts EXTVCC to DRVCC,
bypassing the internal LDO. See Applications Information
for more details.
3811f
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11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet LTC3811.PDF ] | |
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