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PDF MC56F8002 Data sheet ( Hoja de datos )
| Número de pieza | MC56F8002 | |
| Descripción | (MC56F8002 / MC56F8006) Digital Signal Controller | |
| Fabricantes | Freescale Semiconductor | |
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Freescale Semiconductor
Preliminary Technical Data
Document Number: MC56F8006
Rev. 2, 03/2009
MC56F8006/MC56F8002
www.datasheet4u.com
MC56F8006/MC56F8002
Digital Signal Controller
48-pin LQFP
Case: 932-03
7 x 7 mm2
28-pin SOIC
Case: 751F-05
7.5 x 18 mm2
32-pin LQFP
Case: 873A-03
7 x 7 mm2
The 56F8006/56F8002 is a member of the 56800E core-based
family of digital signal controllers (DSCs). It combines, on a
single chip, the processing power of a DSP and the
functionality of a microcontroller with a flexible set of
peripherals to create an extremely cost-effective solution.
Because of its low cost, configuration flexibility, and compact
program code, the 56F8006/56F8002 is well-suited for many
applications. The 56F8006/56F8002 includes many
peripherals that are especially useful for cost-sensitive
applications, including:
• Industrial control
• Home appliances
• Smart sensors
• Fire and security systems
• Switched-mode power supply and power management
• Power metering
• Motor control (ACIM, BLDC, PMSM, SR, and stepper)
• Handheld power tools
• Arc detection
• Medical device/equipment
• Instrumentation
• Lighting ballast
The 56800E core is based on a dual Harvard-style architecture
consisting of three execution units operating in parallel,
allowing as many as six operations per instruction cycle. The
MCU-style programming model and optimized instruction set
allow straightforward generation of efficient, compact DSP
and control code. The instruction set is also highly efficient
for C compilers to enable rapid development of optimized
control applications.
The 56F8006/56F8002 supports program execution from
internal memories. Two data operands can be accessed from
the on-chip data RAM per instruction cycle. The
56F8006/56F8002 also offers up to 40 general-purpose
input/output (GPIO) lines, depending on peripheral
configuration.
The 56F8006/56F8002 digital signal controller includes up to
16 KB of program flash and 2 KB of unified data/program
RAM. Program flash memory can be independently bulk
erased or erased in small pages of 512 bytes (256 words).
On-chip features include:
• Up to 32 MIPS at 32 MHz core frequency
• DSP and MCU functionality in a unified, C-efficient
architecture
• On-chip memory
– 56F8006: 16 KB (8K x 16) flash memory
– 56F8002: 12 KB (6K x 16) flash memory
– 2 KB (1K x 16) unified data/program RAM
• One 6-channel PWM module
• Two 28-channel, 12-bit analog-to-digital converters
(ADCs)
• Two programmable gain amplifiers (PGA) with gain up to
32x
• Three analog comparators
• One programmable interval timer (PIT)
• One high-speed serial communication interface (SCI) with
LIN slave functionality
• One serial peripheral interface (SPI)
• One 16-bit dual timer (2 x 16 bit timers)
• One programmable delay block (PDB)
• One SMBus compatible inter-integrated circuit (I2C) port
• One real time counter (RTC)
• Computer operating properly (COP)/watchdog
• Two on-chip relaxation oscillators — 1 kHz and 8 MHz
(400 kHz at standby mode)
• Crystal oscillator
• Integrated power-on reset (POR) and low-voltage interrupt
(LVI) module
• JTAG/enhanced on-chip emulation (OnCE™) for
unobtrusive, real-time debugging
• Up to 40 GPIO lines
• 28-pin SOIC, 32-pin LQFP, and 48-pin LQFP packages
This document contains information on a product under development. Freescale reserves the
right to change or discontinue this product without notice.
© Freescale Semiconductor, Inc., 2009. All rights reserved.
1 page  
Overview
• Parallel instruction set with unique DSP addressing modes
• Hardware DO and REP loops
• Three internal address buses
• Four internal data buses
• Instruction set supports DSP and controller functions
• Controller-style addressing modes and instructions for compact code
www.datasheet4u.com
• Efficient C compiler and local variable support
• Software subroutine and interrupt stack with depth limited only by memory
• JTAG/enhanced on-chip emulation (EOnCE) for unobtrusive, processor speed–independent, real-time debugging
3.1.2 Operation Range
• 1.8 V to 3.6 V operation (power supplies and I/O)
• From power-on-reset: approximately 1.9 V to 3.6 V
• Ambient temperature operating range: –40 °C to 105 °C
3.1.3 Memory
• Dual Harvard architecture permits as many as three simultaneous accesses to program and data memory
• Flash security and protection that prevent unauthorized users from gaining access to the internal flash
• On-chip memory
— 16 KB of program flash for 56F8006 and 12 KB of program flash for 56F8002
— 2 KB of unified data/program RAM
• EEPROM emulation capability using flash
3.1.4 Interrupt Controller
• Five interrupt priority levels
— Three user programmable priority levels for each interrupt source: Level 0, 1, 2
— Unmaskable level 3 interrupts include: illegal instruction, hardware stack overflow, misaligned data access, SWI3
instruction. Maskable level 3 interrupts include: EOnCE step counter, EOnCE breakpoint unit, EOnCE trace
buffer
— Lowest-priority software interrupt: level LP
• Allow nested interrupt that higher priority level interrupt request can interrupt lower priority interrupt subroutine
• The masking of interrupt priority level is managed by the 56800E core
• One programmable fast interrupt that can be assigned to any interrupt source
• Notification to system integration module (SIM) to restart clock out of wait and stop states
• Ability to relocate interrupt vector table
3.1.5 Peripheral Highlights
• One multi-function, six-output pulse width modulator (PWM) module
— Up to 96 MHz PWM operating clock
— 15 bits of resolution
— Center-aligned and edge-aligned PWM signal mode
— Phase shifting PWM pulse generation
— Four programmable fault inputs with programmable digital filter
Freescale Semiconductor
MC56F8006/MC56F8002 Digital Signal Controller, Rev. 2
5
5 Page 
Signal/Connection Descriptions
3.4 Product Documentation
The documents listed in Table 2 are required for a complete description and proper design with the 56F8006/56F8002.
Documentation is available from local Freescale distributors, Freescale Semiconductor sales offices, Freescale Literature
Distribution Centers, or online at http://www.freescale.com.
Table 2. 56F8006/56F8002 Device Documentation
www.datasheet4u.com
Topic
Description
Order Number
DSP56800E Reference
Manual
Detailed description of the 56800E family architecture,
16-bit digital signal controller core processor, and the
instruction set
56F800x Peripheral
Reference Manual
Detailed description of peripherals of the 56F8006 and
56F8002 devices
56F80x Serial Bootloader Detailed description of the Serial Bootloader in the
User Guide
56F800x family of devices
56F8006/56F8002 Electrical and timing specifications, pin descriptions, and
Technical Data Sheet package descriptions (this document)
56F8006/56F8002 Errata Details any chip issues that might be present
DSP56800ERM
MC56F8006RM
TBD
MC56F8006
MC56F8006E
4 Signal/Connection Descriptions
4.1 Introduction
The input and output signals of the 56F8006/56F8002 are organized into functional groups, as detailed in Table 3. Table 4
summarizes all device pins. In Table 4, each table row describes the signal or signals present on a pin, sorted by pin number.
Table 3. Functional Group Pin Allocations
Functional Group
Number of Pins Number of Pins Number of Pins
in 28 SOIC
in 32 LQFP
in 48 LQFP
Power Inputs (VDD, VDDA)
224
Ground (VSS, VSSA)
Reset1
334
111
Pulse Width Modulator (PWM) Ports1
10 12 12
Serial Peripheral Interface (SPI) Ports1
5
7
7
Serial Communications Interface 0 (SCI) Ports1
4
5
5
Inter-Integrated Circuit Interface (I2C) Ports1
6
7
7
Analog-to-Digital Converter (ADC) Inputs1
16
18
24
High Speed Analog Comparator Inputs1
13
15
25
Programmable Gain Amplifiers (PGA)1
4
4
4
Dual Timer Module (TMR) Ports1
8 10 10
Programmable Delay Block (PDB)1
——
1
Clock1
555
JTAG/Enhanced On-Chip Emulation (EOnCE1)
4
4
4
1 Pins may be shared with other peripherals. See Table 4.
Freescale Semiconductor
MC56F8006/MC56F8002 Digital Signal Controller, Rev. 2
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet MC56F8002.PDF ] | |
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