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PDF LTC2217 Data sheet ( Hoja de datos )
| Número de pieza | LTC2217 | |
| Descripción | 105Msps Low Noise ADC | |
| Fabricantes | Linear Technology | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de LTC2217 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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FEATURES
www■.datSaashmeept4leu.cRoamte: 105Msps
■ 81.3dBFS Noise Floor
■ 100dB SFDR
■ SFDR >90dB at 70MHz
■ 85fsRMS Jitter
■ 2.75VP-P Input Range
■ 400MHz Full Power Bandwidth S/H
■ Optional Internal Dither
■ Optional Data Output Randomizer
■ LVDS or CMOS Outputs
■ Single 3.3V Supply
■ Power Dissipation: 1.19W
■ Clock Duty Cycle Stabilizer
■ Pin Compatible with LTC2208
■ 64-Pin (9mm × 9mm) QFN Package
APPLICATIONS
■ Telecommunications
■ Receivers
■ Cellular Base Stations
■ Spectrum Analysis
■ Imaging Systems
■ ATE
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners. Patents Pending.
LTC2217
16-Bit, 105Msps
Low Noise ADC
DESCRIPTION
The LTC®2217 is a 105Msps sampling 16-bit A/D converter
designed for digitizing high frequency, wide dynamic range
signals with input frequencies up to 400MHz. The input
range of the ADC is fixed at 2.75VP-P.
The LTC2217 is perfect for demanding communications
applications, with AC performance that includes 81.3dBFS
Noise Floor and 100dB spurious free dynamic range
(SFDR). Ultra low jitter of 85fsRMS allows undersampling
of high input frequencies while maintaining excellent noise
performance. Maximum DC specifications include ±3.5LSB
INL, ±1LSB DNL (no missing codes).
The digital output can be either differential LVDS or
single-ended CMOS. There are two format options for the
CMOS outputs: a single bus running at the full data rate or
demultiplexed buses running at half data rate. A separate
output power supply allows the CMOS output swing to
range from 0.5V to 3.6V.
The ENC+ and ENC– inputs may be driven differentially
or single-ended with a sine wave, PECL, LVDS, TTL or
CMOS inputs. An optional clock duty cycle stabilizer al-
lows high performance at full speed with a wide range of
clock duty cycles.
TYPICAL APPLICATION
3.3V
SENSE
VCM
2.2μF
1.575V
COMMON MODE
BIAS VOLTAGE
INTERNAL ADC
REFERENCE
GENERATOR
OVDD
AIN+
ANALOG
INPUT
AIN–
+
S/H
AMP
–
16-BIT
PIPELINED
ADC CORE
CORRECTION
LOGIC AND
SHIFT REGISTER
OUTPUT
DRIVERS
CLOCK/DUTY
CYCLE
CONTROL
ENC + ENC –
OGND
VDD
GND
SHDN DITH MODE LVDS RAND
ADC CONTROL INPUTS
0.5V TO 3.6V
1μF
OF
CLKOUT
D15
•
•
•
D0
CMOS
OR
LVDS
1μF 1μF
3.3V
1μF
2217 TA01
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
–130
0
64k Point FFT,
FIN = 4.9MHz, –1dBFS
10 20 30 40
FREQUENCY (MHz)
50
2217 TA01b
2217f
1
1 page  
LTC2217
DIGITAL INPUTS AND DIGITAL OUTPUTS The ● denotes the specifications which apply over the
full operating temperature range, otherwise specifications are at TA = 25°C. (Note 4)
SYMBOL
PARAMETER
Encode Inputs (ENC+, ENC–)
www.datasheet4u.com
VID Differential Input Voltage
VICM Common Mode Input Voltage
CONDITIONS
(Note 7)
Internally Set
Externally Set (Note 7)
MIN TYP MAX UNITS
● 0.2
1.2
1.6
3
V
V
V
RIN
CIN
Logic Inputs
Input Resistance
Input Capacitance
(See Figure 2)
(Note 7)
6 kΩ
3 pF
VIH High Level Input Voltage
VIL Low Level Input Voltage
IIN Digital Input Current
CIN Digital Input Capacitance
LOGIC OUTPUTS (CMOS MODE)
VDD = 3.3V
VDD = 3.3V
VIN = 0V to VDD
(Note 7)
●2
●
●
0.8
±10
1.5
V
V
μA
pF
OVDD = 3.3V
VOH
VOL
ISOURCE
ISINK
High Level Output Voltage
Low Level Output Voltage
Output Source Current
Output Sink Current
VDD = 3.3V
VDD = 3.3V
VOUT = 0V
VOUT = 3.3V
IO = –10μA
IO = –200μA
IO = 160μA
IO = 1.6mA
● 3.1
●
3.299
3.29
0.01
0.10
– 50
50
0.4
V
V
V
V
mA
mA
OVDD = 2.5V
VOH
VOL
OVDD = 1.8V
VOH
High Level Output Voltage
Low Level Output Voltage
High Level Output Voltage
VDD = 3.3V
VDD = 3.3V
VDD = 3.3V
IO = –200μA
IO = 1.60mA
IO = –200μA
2.49 V
0.1 V
1.79 V
VOL Low Level Output Voltage
LOGIC OUTPUTS (LVDS MODE)
VDD = 3.3V
IO = 1.60mA
0.1 V
STANDARD LVDS
VOD Differential Output Voltage
VOS Output Common Mode Voltage
Low Power LVDS
100Ω Differential Load
100Ω Differential Load
● 247
350
454
● 1.125 1.2 1.375
mV
V
VOD
Differential Output Voltage
100Ω Differential Load
VOS Output Common Mode Voltage 100Ω Differential Load
● 125
175
250
● 1.125 1.2 1.375
mV
V
2217f
5
5 Page 
TYPICAL PERFORMANCE CHARACTERISTICS
LTC2217
64k Point FFT, fIN = 70.1MHz,
–20dBFS, Dither “On”
www.datasheet4u.com
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
–130
0
10 20 30 40 50
FREQUENCY (MHz)
2217 G19
SNR vs Input Level, FIN = 70.5MHz
82
81
80
79
78
–80 –70 –60 –50 –40 –30 –20 –10 0
INPUT LEVEL (dBFS)
2217 G22
64k Point 2-Tone FFT,
fIN = 67.2MHz and 74.4MHz,
–25dBFS, Dither “On”
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
–130
0
10 20 30 40
FREQUENCY (MHz)
50
2217 G25
SFDR vs Input Level,
fIN = 70.5MHz, Dither “Off”
140
130
120
110
100
90
80
70
60
50
40
30
–80 –70 –60 –50 –40 –30 –20 –10 0
INPUT LEVEL (dBFS)
2217 G20
64k Point 2-Tone FFT,
fIN = 67.2MHz and 74.4MHz,
–7dBFS
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
–130
0
10 20 30 40
FREQUENCY (MHz)
50
2217 G23
64k Point FFT, fIN = 140.5MHz,
–1dBFS
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
–130
0
10 20 30 40
FREQUENCY (MHz)
50
2217 G26
SFDR vs Input Level,
fIN = 70.5MHz, Dither “On”
140
130
120
110
100
90
80
70
60
50
40
30
–80 –70 –60 –50 –40 –30 –20 –10 0
INPUT LEVEL (dBFS)
2217 G21
64k Point 2-Tone FFT,
fIN = 67.2MHz and 74.4MHz,
–15dBFS, Dither “On”
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
–130
0
10 20 30 40
FREQUENCY (MHz)
50
2217 G24
64k Point FFT, fIN = 140.1MHz,
–20dBFS, Dither “On”
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
–130
0
10 20 30 40
FREQUENCY (MHz)
50
2217 G27
2217f
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet LTC2217.PDF ] | |
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