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PDF IS62WV2568BLL Data sheet ( Hoja de datos )
| Número de pieza | IS62WV2568BLL | |
| Descripción | ULTRA LOW POWER CMOS STATIC RAM | |
| Fabricantes | Integrated Silicon Solution | |
| Logotipo |  |
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IS62WV2568ALL
IS62WV2568BLL
www.DataSheet4U.com
256K x 8 LOW VOLTAGE,
ULTRA LOW POWER CMOS STATIC RAM
ISSI®
JUNE 2005
FEATURES
• High-speed access time: 55ns, 70ns
• CMOS low power operation
– 36 mW (typical) operating
– 9 µW (typical) CMOS standby
• TTL compatible interface levels
• Single power supply
– 1.65V--2.2V VCC (62WV2568ALL)
– 2.5V--3.6V VCC (62WV2568BLL)
• Fully static operation: no clock or refresh
required
• Three state outputs
• Industrial temperature available
• Lead-free available
DESCRIPTION
The ISSI IS62WV2568ALL / IS62WV2568BLL are high-
speed, 2M bit static RAMs organized as 256K words by 8
bits. It is fabricated using ISSI's high-performance CMOS
technology. This highly reliable process coupled with
innovative circuit design techniques, yields high-
performance and low power consumption devices.
When CS1 is HIGH (deselected) or when CS2 is LOW
(deselected) or when CS1 is LOW, CS2 is HIGH, the device
assumes a standby mode at which the power dissipation
can be reduced down with CMOS input levels.
Easy memory expansion is provided by using Chip Enable
and Output Enable inputs. The active LOW Write Enable
(WE) controls both writing and reading of the memory.
The IS62WV2568ALL and IS62WV2568BLL are packaged
in the JEDEC standard 32-pin TSOP (TYPE I), sTSOP
(TYPE I), and 36-pin mini BGA.
FUNCTIONAL BLOCK DIAGRAM
A0-A17
VCC
GND
I/O0-I/O7
DECODER
I/O
DATA
CIRCUIT
256K x 8
MEMORY ARRAY
COLUMN I/O
CS2
CS1
OE
WE
CONTROL
CIRCUIT
Copyright © 2002 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to
obtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. B
06/20/05
1
1 page  
IS62WV2568ALL, IS62WV2568BLL
PwOwwW.DaEtaRShSeeUt4UP.cPoLmY CHARACTERISTICS(1) (Over Operating Range)
62WV2568ALL (1.65V-2.2V)
Symbol Parameter
Test Conditions
ICC VccDynamicOperating VCC=Max.,
Com.
SupplyCurrent
IOUT = 0 mA, f = fMAX
Ind.
ICC1 OperatingSupply
VCC = Max.,
Com.
Current
IOUT = 0 mA, f = 0
Ind.
ISB1 TTLStandbyCurrent
VCC = Max.,
Com.
(TTL Inputs)
VIN = VIH or VIL
Ind.
CS1 = VIH , CS2 = VIL,
f = 1 MHZ
ISB2 CMOSStandby
VCC = Max.,
Com.
Current(CMOSInputs) CS1≥ VCC–0.2V,
Ind.
CS2 ≤ 0.2V,
VIN ≥ VCC – 0.2V,or
VIN ≤ 0.2V, f = 0
Max.
70 ns
15
15
3
3
0.3
0.3
5
10
ISSI ®
Unit
mA
mA
mA
µA
POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range)
62WV2568BLL (2.5V - 3.6V)
Symbol Parameter
Test Conditions
ICC VccDynamicOperating VCC=Max.,
Com.
SupplyCurrent
IOUT = 0 mA, f = fMAX
Ind.
ICC1 OperatingSupply
VCC = Max.,
Com.
Current
IOUT = 0 mA, f = 0
Ind.
ISB1 TTLStandbyCurrent
VCC = Max.,
Com.
(TTL Inputs)
VIN = VIH or VIL
Ind.
CS1 = VIH , CS2 = VIL,
f = 1 MHZ
ISB2 CMOSStandby
VCC = Max.,
Com.
Current(CMOSInputs) CS1≥ VCC–0.2V,
Ind.
CS2 ≤ 0.2V,
VIN ≥ VCC – 0.2V,or
VIN ≤ 0.2V, f = 0
Max.
55 ns
30
35
3
3
0.3
0.3
Max.
70 ns
25
30
3
3
0.3
0.3
10 10
10 10
Unit
mA
mA
mA
µA
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. B
06/20/05
5
5 Page 
IS62WV2568ALL, IS62WV2568BLL
PwLwwA.DSaTtaISCheest4TUS.cOomP - 32 PINS
Package Code: H (Type 1)
1
A2
A
N
E
A1
b
e
D1 S
SEATING PLANE
D
ISSI ®
L αC
PLASTIC sTSOP (H-TYPE 1)
MILLIMETERS
INCHES
Symbol
REF. STD
N0. Leads
A
A1
A2
b
C
D
D1
E
e
L
S
α
Min.
Max.
Min.
Max.
—
0.05
0.95
0.17
0.142
13.2
11.7
7.9
0.50
0.30
0.278
00
1.25
—
1.05
0.23
0.158
13.6
11.9
8.1
BSC
0.70
TYP.
50
32
—
0.002
0.037
0.007
0.0056
0.520
0.461
0.311
0.020
0.012
0.0109
00
0.049
—
0.041
0.009
0.0082
0.535
0.469
0.319
BSC
0.028
TYP.
50
Notes:
1. Controlling dimension: millimeters, unless
otherwise specified.
2. BSC = Basic lead spacing between centers.
3. Dimensions D1 and E do not include
mold flash protrusion and should be
measured from the bottom of the package.
4. Formed leads shall be planar with respect
to one another within 0.004 inches at the
seating plane.
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. B
06/20/05
11
11 Page | ||
| Páginas | Total 14 Páginas | |
| PDF Descargar | [ Datasheet IS62WV2568BLL.PDF ] | |
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