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PDF HV9931 Data sheet ( Hoja de datos )
| Número de pieza | HV9931 | |
| Descripción | UNITY POWER FACTOR LED LAMP DRIVER | |
| Fabricantes | Supertex | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de HV9931 (archivo pdf) en la parte inferior de esta página. Total 7 Páginas | ||
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HV9931
Initial Release
HV9931 Unity Power Factor LED Lamp Driver
Features
Constant Output Current
Large Step-Down Ratio
Unity Power Factor
Low Input Current Harmonic Distortion
Fixed Frequency or Fixed Off-Time Operation
Internal 450V Linear Regulator
Input and output current sensing
www.DataSheeItn4pUu.ctoCmurrent limit
Enable, PWM and Phase Dimming
Applications
Offline LED Lamps and Fixtures
Street lamps
Traffic Signals
Decorative Lighting
Typical Application Circuit
D1
General Description
The HV9931 is a fixed frequency PWM controller IC designed
to control an LED lamp driver using a single-stage PFC
buckboost-buck topology. It can achieve a unity power factor
and a very high step-down ratio that enables driving a single
high-brightness LED from the 85-264VAC input without a
need for a power transformer. This topology allows reducing
the filter capacitors and using non-electrolytic capacitors to
improve reliability. The HV9931 uses open-loop peak current
control to regulate both the input and the output current. This
control technique eliminates a need for loop compensation,
limits the input inrush current, and is inherently protected
from input under-voltage condition. Capacitive isolation
protects the LED Lamp from failure of the switching MOSFET.
HV9931 provides a low-frequency PWM dimming input that
can accept an external control signal with a duty ratio of 0-
100% and a frequency of up to a few kilohertz. The PWM
dimming capability enables HV9931 phase control solutions
that can work with standard wall dimmers.
L1
D4
VIN
C1 D2
L2
~AC ~AC
CIN
RS1
Q1
D3
RS2
-
VO
+
Rref1
RCS1
HV9931
VIN
GATE
RT
PWMD
CS1 CS2
GND
VDD
RCS2
RT
Rref2
C2
NR081505
1
1 page  
Functional Description
HV9931
Power Topology
The HV9931 is optimized to drive Supertex’s proprietary single-
stage, single-switch, non-isolated topology, cascading an input
power factor correction (PFC) buck-boost stage and an output
buck converter power stage. This power converter topology offers
numerous advantages useful for driving high-brightness light
emitting diodes (HB LED). These advantages include unity power
factor, low harmonic distortion of the input AC line current, and low
output current ripple. The output load is decoupled from the input
voltage with a capacitor making the driver inherently failure-safe for
the output load. The power converter topology also permits reducing
the size of a filter capacitor needed, enabling use of non-electrolytic
capacitors. The latter advantage greatly improves reliability of the
overall solution.
w w w . DTahet aHVS9h93e1eist 4a Upe.ackocumrrent-mode controller that is specifically
designed to drive a constant current buckboost-buck power
converter. This patent pending control scheme features two identical
current sense comparators for detecting negative current signal
levels. One of the comparators regulates the output LED current.
The other one is used for sensing the input inductor current. The
second comparator is mainly responsible for the converter start-
up. The control scheme inherently features low inrush current
and input under-voltage protection. The HV9931 can operate with
programmable constant frequency or constant off-time. In many
cases, the constant off-time operating mode is preferred, since
it improves line regulation of the output current, reduces voltage
stress of the power components and simplifies regulatory EMI
compliance. (See Application Note AN-H52.)
Input Voltage Regulator
than the output one. Therefore, disabling the HV9931 via its PWMD
or VIN pins can interrupt the output LED current in accordance with
the phase-controlled voltage waveform of a standard wall dimmer.
Oscillator
Connecting an external resistor from RT pin to GND programs
switching frequency:
FS
[kHz ] =
RT
25000
[KΩ ]+
22
Connecting the resistor from RT pin to GATE programs constant
off-time:
TOFF
[µ s ] =
RT
[KΩ ]+
25
22
Input and Output Current Feedback
Two current sense comparators are included in the HV9931. Both
comparators have their non-inverting inputs internally connected to
ground (GND). The CS1 and CS2 inputs are inverting inputs of the
comparators. Connecting a resistor divider into either of these inputs
from a positive reference voltage and a negative current sense
signal programs the current sense threshold of the comparator. The
VDD voltage of the HV9931 can be used as the reference voltage.
(If more accuracy is needed, an external reference voltage can be
applied.) When either the CS1 or the CS2 pin voltage falls below
GND, the GATE pulse is terminated. A leading edge blanking delay
of 215ns (typ) is added. The GATE voltage becomes high again
upon receiving the next clock pulse of the oscillator circuit.
The HV9931 can be powered directly from its VIN pin and takes a
voltage from 8V to 450V. When a voltage is applied at the VIN pin,
the HV9931 seeks to maintain a constant 7.5V at the VDD pin. The
VDD voltage can be also used as a reference for the current sense
comparators. The regulator is equipped with an under-voltage
protection circuit which shuts off the HV9931 when the voltage at
the VDD pin falls below 6.2V.
Referring to the Functional Circuit Diagram, the CS2 comparator is
responsible for regulating output current. The output LED current
can be programmed using the following equation:
RCS 2
=
Io
+
1
2
∆IL2
7.5V
⋅ RREF 2
⋅ RS 2
The VDD pin must be bypassed by a low ESR capacitor (≥ 0.1µF) to
provide a low impedance path for the high frequency current of the
output gate driver.
The HV9931 can also be operated by supplying a voltage at the VDD
pin greater than the internally regulated voltage. This will turn off
the internal linear regulator and the HV9931 will function by drawing
power from the external voltage source connected to the VDD pin.
PWM Dimming and Wall Dimmer Compatibility
PWM Dimming can be achieved by applying a TTL-compatible
square wave signal at the PWMD pin. When the PWMD pin is
pulled high, the gate driver is enabled and the circuit operates
normally. When the PWMD pin is left open or connected to GND,
the gate driver is disabled and the external MOSFET turns off. The
HV9931 is designed so that the signal at the PWMD pin inhibits the
driver only, and the IC need not go through the entire start-up cycle
each time ensuring a quick response time for the output current.
The power topology requires little filter capacitance at the output,
since the output current of the buck stage is continuous, and since
AC line filtering is accomplished through the middle capacitor rather
where ∆IL2 is the peak-to-peak current ripple in L2. The CS1
comparator limits the current in the input inductor L1. There is
no charge in the capacitor C1 upon the start-up of the converter.
Therefore, L2 cannot develop the output current, and the HV9931
starts-up in the input current limiting mode. The CS1 current
threshold must be programmed such that no input current limiting
occurs in normal steady-state operation. The CS1 threshold can be
programmed in accordance with a similar equation:
RCS 1
=
I L1( PK )
7.5V
⋅ RREF 1 ⋅ RS1
where IL1(PK) is the maximum peak current in L1.
MOSFET Gate Driver
Typically, the gate driving capability of the HV9931 is limited by the
amount of power dissipation in its linear regulator. Thus, care must
be taken selecting a switching MOSFET to be used in the circuit.
An optimal trade-off must be found between the gate charge and
the on-resistance of the MOSFET to minimize the input regulator
current.
NR081505
5
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet HV9931.PDF ] | |
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