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PDF LTC2309 Data sheet ( Hoja de datos )
| Número de pieza | LTC2309 | |
| Descripción | 12-Bit SAR ADC | |
| Fabricantes | Linear Technology Corporation | |
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LTC2309
8-Channel, 12-Bit SAR ADC
with I2C Interface
FEATURES
n 12-Bit Resolution
n Low Power: 1.5mW at 1ksps, 35μW Sleep Mode
n 14ksps Throughput Rate
n Low Noise: SNR = 73.4dB
n Guaranteed No Missing Codes
www.DataShneetS4Uin.cgolme
n 2-wire
5V Supply
I2C Compatible
Serial
Interface
with
Nine
Addresses Plus One Global for Synchronization
n Fast Conversion Time: 1.3μs
n Internal Reference
n Internal 8-Channel Multiplexer
n Internal Conversion Clock
n Unipolar or Bipolar Input Ranges (Software Selectable)
n 24-Pin 4mm × 4mm QFN Package
APPLICATIONS
n Industrial Process Control
n Motor Control
n Accelerometer Measurements
n Battery-Operated Instruments
n Isolated and/or Remote Data Acquisition
n Power Supply Monitoring
DESCRIPTION
The LTC®2309 is a low noise, low power, 8-channel, 12-bit
successive approximation ADC with an I2C compatible
serial interface. This ADC includes an internal reference
and a fully differential sample-and-hold circuit to reduce
common mode noise. The LTC2309 operates from an
internal clock to achieve a fast 1.3μs conversion time.
The LTC2309 operates from a single 5V supply and
draws just 300μA at a throughput rate of 1ksps. The
ADC enters nap mode when not converting, reducing
the power dissipation.
The LTC2309 is available in a small 24-pin 4mm × 4mm
QFN package. The internal 2.5V reference and 8-channel
multiplexer further reduce PCB board space require-
ments.
The low power consumption and small size make the
LTC2309 ideal for battery-operated and portable applica-
tions, while the 2-wire I2C compatible serial interface makes
this ADC a good match for space-constrained systems.
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
BLOCK DIAGRAM
10μF
0.1μF
5V
0.1μF
10μF
CH0
CH1
CH2
ANALOG INPUTS
CH3
0V TO 4.096V UNIPOLAR CH4
±2.048V BIPOLAR CH5
CH6
CH7
COM
AVDD
DVDD
LTC2309
ANALOG
INPUT
MUX
+ 12-BIT
– SAR ADC
AD1
AD0
I2C
PORT
SCL
SDA
INTERNAL
2.5V REF
VREF
2.2μF
GND
0.1μF
REFCOMP
10μF
2309 TA01
1.00
0.75
0.50
0.25
0
–0.25
–0.50
–0.75
–1.00
0
Integral Nonlinearity
vs Output Code
1024
2048
3072
OUTPUT CODE
4096
2309 G01
2309f
1
1 page  
LTC2309
I2C TIMING CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. (Note 4)
SYMBOL PARAMETER
CONDITIONS
MIN TYP MAX
fSCL SCL Clock Frequency
tHD(SDA) Hold Time (Repeated) Start Condition
tLOW Low Period of the SCL Pin
tHIGH High Period of the SCL Pin
tSU(STA) Set-Up Time for a Repeated Start Condition
tHD(DAT) Data Hold Time
tSU(DAT) Data Set-Up Time
www.DataShter et4U.comRise Time for SDA/SCL Signals
tf Fall Time for SDA/SCL Signals
tSU(STO) Set-Up Time for Stop Condition
tBUF Bus Free Time Between a Stop and Start Condition
(Note 12)
(Note 12)
l
l 0.6
l 1.3
l 0.6
l 0.6
l0
l 100
l 20 + 0.1CB
l 20 + 0.1CB
l 0.6
l 1.3
400
0.9
300
300
UNITS
kHz
μs
μs
μs
μs
μs
ns
ns
ns
μs
μs
ADC TIMING CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. (Note 4)
SYMBOL PARAMETER
CONDITIONS
MIN TYP MAX UNITS
fSMPL
tCONV
tACQ
tREFWAKE
Throughput Rate (Successive Reads)
Conversion Time
Acquisition Time
REFCOMP Wake-Up Time (Note 13)
(Note 9)
(Note 9)
CREFCOMP = 10μF, CREF = 2.2μF
l
l
l
14 ksps
1.3 1.8
μs
240 ns
200 ms
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All voltage values are with respect to ground with AVDD and DVDD
wired together (unless otherwise noted).
Note 3: When these pin voltages are taken below ground or above VDD,
they will be clamped by internal diodes. These products can handle input
currents greater than 100mA below ground or above VDD without latchup.
Note 4: AVDD = 5V, DVDD = 5V, fSMPL = 14ksps internal reference unless
otherwise noted.
Note 5: Linearity, offset and full-scale specifications apply for a
single-ended analog input with respect to COM.
Note 6: Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve.
The deviation is measured from the center of the quantization band.
Note 7: Bipolar zero error is the offset voltage measured from –0.5LSB
when the output code flickers between 0000 0000 0000 and 1111 1111
1111. Unipolar zero error is the offset voltage measured from +0.5LSB
when the output code flickers between 0000 0000 0000 and 0000 0000
0001.
Note 8: Full-scale bipolar error is the worst-case of –FS or +FS untrimmed
deviation from ideal first and last code transitions and includes the effect
of offset error. Unipolar full-scale error is the deviation of the last code
transition from ideal and includes the effect of offset error.
Note 9: Guaranteed by design, not subject to test.
Note 10: All specifications in dB are referred to a full-scale ±2.048V input
with a 2.5V reference voltage.
Note 11: Full linear bandwidth is defined as the full-scale input frequency
at which the SINAD degrades to 60dB or 10 bits of accuracy.
Note 12: CB = capacitance of one bus line in pF (10pF ≤ CB ≤ 400pF).
Note 13: REFCOMP wake-up time is the time required for the REFCOMP
pin to settle within 0.5LSB at 12-bit resolution of its final value after
waking up from SLEEP mode.
2309f
5
5 Page 
LTC2309
APPLICATIONS INFORMATION
When using a filter with a large CFILTER value (e.g. 1μF),
the inputs do not completely settle and the capacitive
input switching currents are averaged into a net DC
current (IDC). In this case, the analog input can be mod-
eled by an equivalent resistance (REQ = 1/(fSMPL • CIN))
in series with an ideal voltage source (VREFCOMP/2) as
shown in Figure 3b. The magnitude of the DC current
is then approximately IDC = (VIN – VREFCOMP/2)/REQ,
www.DataShweeht4icUh.coism roughly proportional to VIN. To prevent large
DC drops across the resistor RFILTER, a filter with a small
resistor and large capacitor should be chosen. When
running at the maximum throughput rate of 14ksps,
the input current equals 1.5μA at VIN = 4.096V, which
amounts to a full-scale error of 0.5LSB when using a
filter resistor (RFILTER) of 333Ω. Applications requiring
lower sample rates can tolerate a larger filter resistor
for the same amount of full-scale error.
RSOURCE
VIN
INPUT
CH0-CH7
CFILTER
RON
100Ω
LTC2309
CIN
55pF
2309 F03a
Figure 3a. Analog Input Equivalent Circuit
RFILTER
VIN
INPUT
IDC CH0-CH7
CFILTER
REQ LTC2309
1/(fSMPL • CIN)
+– VREFCOMP/2
2309 F03b
Figure 3b. Analog Input Equivalent
Circuit for Large Filter Capacitances
Figures 4a and 4b show examples of input filtering for
single-ended and differential inputs. For the single-
ended case in Figure 4a, a 50Ω source resistor and a
2000pF capacitor to ground on the input will limit the
input bandwidth to 1.6MHz. High quality capacitors and
resistors should be used in the RC filter since these
components can add distortion. NPO and silver mica
type dielectric capacitors have excellent linearity. Carbon
surface mount resistors can generate distortion from
ANALOG
INPUT
50Ω
CH0
2000pF
LTC2309
COM
0.1μF
10μF
REFCOMP
2309 F04a
Figure 4a. Optional RC Input Filtering for Single-Ended Input
DIFFERENTIAL
ANALOG
INPUTS
50Ω
50Ω
0.1μF
1000pF
CH0
1000pF
LTC2309
CH1
1000pF
10μF
REFCOMP
2309 F04b
Figure 4b. Optional RC Input Filtering for Differential Inputs
self heating and from damage that may occur during
soldering. Metal film surface mount resistors are much
less susceptible to both problems.
Dynamic Performance
Fast Fourier Transform (FFT) test techniques are used to
test the ADC’s frequency response, distortion and noise
at the rated throughput. By applying a low distortion
sine wave and analyzing the digital output using an FFT
algorithm, the ADC’s spectral content can be examined
for frequencies outside the fundamental.
Signal-to-Noise and Distortion Ratio (SINAD)
The signal-to-noise and distortion ratio (SINAD) is the
ratio between the RMS amplitude of the fundamental
input frequency to the RMS amplitude of all other fre-
quency components at the A/D output. The output is
band-limited to frequencies from above DC and below
half the sampling frequency. Figure 5 shows a typical
SINAD of 73.3dB with a 14kHz sampling rate and a
1kHz input. An SNR of 73.4dB can be achieved with
the LTC2309.
2309f
11
11 Page | ||
| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet LTC2309.PDF ] | |
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