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PDF AS7C33256PFS16A Data sheet ( Hoja de datos )
| Número de pieza | AS7C33256PFS16A | |
| Descripción | (AS7C33256PFS16A / AS7C33256PFS18A) 3.3V 256K X 16/18 pipeline burst synchronous SRAM | |
| Fabricantes | Alliance Semiconductor Corporation | |
| Logotipo |  |
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March 2001
AS7C33256PFS16A
AS7C33256PFS18A
®
3.3V 256K × 16/18 pipeline burst synchronous SRAM
Features
• Organization: 262,144 words × 16 or 18 bits
• Fast clock speeds to 166 MHz in LVTTL/LVCMOS
• Fast clock to data access: 3.5/3.8/4.0/5.0 ns
• Fast OE access time: 3.5/3.8/4.0/5.0 ns
• Fully synchronous register-to-register operation
• “Flow-through” mode
• Single-cycle deselect
www.DataSheet4-U.Dcoumal-cycle deselect also available (AS7C33256PFD16A/
AS7C33256PFD18A)
• Pentium®* compatible architecture and timing
• Asynchronous output enable control
• Economical 100-pin TQFP package
• Byte write enables
• Multiple chip enables for easy expansion
• 3.3V core power supply
• 2.5V or 3.3V I/O operation with separate VDDQ
• 30 mW typical standby power in power down mode
• NTD™* pipeline architecture available
(AS7C33256NTD16A/AS7C33256NTD18A)
Logic block diagram
LBO
CLK
ADV
ADSC
ADSP
A[17:0]
CLK
CS Burst logic
256K × 16/18
CLR
18 D
Q 18 16 18
Memory
array
CS Aredgdisrteesrs
CLK
16/18 16/18
GWE
BWb
BWE
BWa
CE0
CE1
CE2
ZZ
Power
down
D DQb Q
BryetgeiWsterriste
CLK
D DQa Q
BryetgeiWsterriste
CLK
D EnableQ
register
CE
CLK
DrEedngeailsbatyleerQ
CLK
2
OE
Output
registers
CLK
Input
registers
CLK
OE
DATA [17:0]
FT DATA [15:0]
Pin arrangement
NC
NC
NC
VDDQ
VSSQ
NC
NC
DQb
DQb
VSSQ
VDDQ
DQb
DQb
FT
VDD
NC
VSS
DQb
DQb
VDDQ
VSSQ
DQb
DQb
DQpb/NC
NC
VSSQ
VDDQ
NC
NC
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
TQFP 14 × 20mm
80 A17
79 NC
78 NC
77 VDDQ
76 VSSQ
75 NC
74 DQpa/NC
73 DQa
72 DQa
71 VSSQ
70 VDDQ
69 DQa
68 DQa
67 VSS
66 NC
65 VDD
64 ZZ
63 DQa
62 DQa
61 VDDQ
60 VSSQ
59 DQa
58 DQa
57 NC
56 NC
55 VSSQ
54 VDDQ
53 NC
52 NC
51 NC
Note: pins 24, 74 are NC for ×16.
Selection guide
AS7C33256PFS16A AS7C33256PFS16A AS7C33256PFS16A AS7C33256PFS16A
–166
–150
–133
–100
Units
Minimum cycle time
6 6.7 7.5 10 ns
Maximum pipelined clock frequency
166
150
133
100 MHz
Maximum pipelined clock access time
3.5
3.8
4
5 ns
Maximum operating current
475 450 425 325 mA
Maximum standby current
130 110 100
90 mA
Maximum CMOS standby current (DC)
30
30
30
30 mA
*Pentium® is a registered trademark of Intel Corporation. NTD™ is a trademark of Alliance Semiconductor Corporation. All trademarks mentioned in this document are
the property of their respective owners.
3/14/01; V.1.0
Alliance Semiconductor
P. 1 of 11
Copyright © Alliance Semiconductor. All rights reserved.
1 page  
®
TQFP thermal resistance
Description
Thermal resistance
(junction to ambient)*
Thermal resistance
(junction to top of case)*
* This parameter is sampled.
Conditions
Test conditions follow standard test
methods and procedures for measuring
thermal impedance, per EIA/JESD51
Symbol
θJA
θJC
AS7C33256PFS16A
AS7C33256PFS18A
Typical
46
2.8
Units
°C/W
°C/W
w w w . D a t a S hDeCe et 4leUct.rcicoaml characteristics
–166
–150
–133
–100
Parameter
Symbol
Test conditions
Min Max Min Max Min Max Min Max Unit
Input leakage
current*
|ILI| VDD = Max, VIN = GND to VDD – 2 – 2 – 2 – 2 µA
Output leakage
current
Operating power
supply current
Standby power
supply current
Output voltage
|ILO|
OE ≥ VIH, VDD = Max,
VOUT = GND to VDD
– 2 – 2 – 2 – 2 µA
ICC
CE0 = VIL, CE1 = VIH, CE2 = VIL,
f = fMax, IOUT = 0 mA
–
475
–
450
–
425
–
325 mA
ISB Deselected, f = fMax, ZZ ≤ VIL – 130 – 110 – 100 – 90
ISB1
Deselected, f = 0, ZZ ≤ 0.2V
all VIN ≤ 0.2V or ≥ VDD – 0.2V
–
30
–
30
–
30
–
30 mA
ISB2
Deselected, f = fMax, ZZ ≥ VDD – 0.2V
All VIN ≤ VIL or ≥ VIH
–
30
–
30
–
30
–
30
VOL
IOL = 8 mA, VDDQ = 3.465V
– 0.4 – 0.4 – 0.4 – 0.4
V
VOH IOH = –4 mA, VDDQ = 3.135V 2.4 – 2.4 – 2.4 – 2.4 –
* LBO pin has an internal pull-up and input leakage = ±10 µa.
Note: ICC give with no output loading. ICC increases with faster cycle times and greater output loading.
DC electrical characteristics for 2.5V I/O operation
Parameter
Output leakage
current
Output voltage
Symbol
|ILO|
VOL
VOH
Test conditions
OE ≥ VIH, VDD = Max,
VOUT = GND to VDD
IOL = 2 mA, VDDQ = 2.65V
IOH = –2 mA, VDDQ = 2.35V
–166
–150
–133
–100
Min Max Min Max Min Max Min Max Unit
–1 1 –1 1 –1 1 –1 1 µA
– 0.7 – 0.7 – 0.7 – 0.7
V
1.7 – 1.7 – 1.7 – 1.7 –
Timing characteristics over operating range
–166
Parameter
Symbol Min Max
Clock frequency
Cycle time (pipelined mode)
Cycle time (flow-through mode)
Clock access time (pipelined mode)
fMax – 166
tCYC 6
–
tCYCF 10 –
tCD – 3.5
–150
Min Max
– 150
6.6 –
10 –
– 3.8
–133
Min Max
– 133
7.5 –
12 –
– 4.0
–100
Min Max
– 100
10 –
12 –
– 5.0
Unit Notes*
MHz
ns
ns
ns
3/14/01; V.1.0
Alliance Semiconductor
P. 5 of 11
5 Page 
AS7C33256PFS16A
AS7C33256PFS18A
®
Ordering information
–166 MHz
AS7C33256PFS16A-166TQC
AS7C33256PFS16A-166TQI
AS7C33256PFS18A-166TQC
AS7C33256PFS18A-166TQI
–150 MHz
–133 MHz
–100 MHz
AS7C33256PFS16A-150TQC AS7C33256PFS16A-133TQC AS7C33256PFS16A-100TQC
AS7C33256PFS16A-150TQI AS7C33256PFS16A-133TQI AS7C33256PFS16A-100TQI
AS7C33256PFS18A-150TQC AS7C33256PFS18A-133TQC AS7C33256PFS18A-100TQC
AS7C33256PFS18A-150TQI AS7C33256PFS18A-133TQI AS7C33256PFS18A-100TQI
Part numbering guide
w w w . D a t a SASh7Ce e t 4 U33. c o m 256
123
PF
4
S 16/18 A
567
1.Alliance Semiconductor SRAM prefix
2.Operating voltage: 33=3.3V
3.Organization: 256=256K
4.Pipeline-Flowthrough (each device works in both modes)
5.Deselect: S=Single cycle deselect
6.Organization: 16=x16; 18=x18
7.Production version: A=first production version
8.Clock speed (MHz)
9.Package type: TQ=TQFP
10.Operating temperature: C=Commercial (0° C to 70° C); I=Industrial (-40° C to 85° C)
–XXX
8
TQ
9
C/I
10
3/14/01; V.1.0
Alliance Semiconductor
P. 11 of 11
© Copyright Alliance Semiconductor Corporation. All rights reserved. Our three-point logo, our name and Intelliwatt are trademarks or registered trademarks of Alliance. All other brand and
product names may be the trademarks of their respective companies. Alliance reserves the right to make changes to this document and its products at any time without notice. Alliance assumes no
responsibility for any errors that may appear in this document. The data contained herein represents Alliance’s best data and/or estimates at the time of issuance. Alliance reserves the right to
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against all claims arising from such use.
11 Page | ||
| Páginas | Total 11 Páginas | |
| PDF Descargar | [ Datasheet AS7C33256PFS16A.PDF ] | |
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