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PDF LM3S1960 Data sheet ( Hoja de datos )
| Número de pieza | LM3S1960 | |
| Descripción | Microcontroller | |
| Fabricantes | Luminary | |
| Logotipo |  |
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PRELIMINARY
LM3S1960 Microcontroller
DATA SHEET
DS-LM3S1960-1972
Copyright © 2007 Luminary Micro, Inc.
1 page  
LM3S1960 Microcontroller
10 General-Purpose Timers ................................................................................................. 200
10.1 Block Diagram ........................................................................................................................ 200
10.2 Functional Description ............................................................................................................. 201
10.2.1 GPTM Reset Conditions .......................................................................................................... 202
10.2.2 32-Bit Timer Operating Modes .................................................................................................. 202
10.2.3 16-Bit Timer Operating Modes .................................................................................................. 203
10.3 Initialization and Configuration ................................................................................................. 207
10.3.1 32-Bit One-Shot/Periodic Timer Mode ....................................................................................... 207
10.3.2 32-Bit Real-Time Clock (RTC) Mode ......................................................................................... 208
10.3.3 16-Bit One-Shot/Periodic Timer Mode ....................................................................................... 208
10.3.4 16-Bit Input Edge Count Mode ................................................................................................. 209
10.3.5 16-Bit Input Edge Timing Mode ................................................................................................ 209
www.DataSheet4U1.0c.o3m.6 16-Bit PWM Mode ................................................................................................................... 210
10.4 Register Map .......................................................................................................................... 210
10.5 Register Descriptions .............................................................................................................. 211
11 Watchdog Timer ............................................................................................................... 236
11.1 Block Diagram ........................................................................................................................ 236
11.2 Functional Description ............................................................................................................. 236
11.3 Initialization and Configuration ................................................................................................. 237
11.4 Register Map .......................................................................................................................... 237
11.5 Register Descriptions .............................................................................................................. 238
12 Universal Asynchronous Receivers/Transmitters (UARTs) ......................................... 259
12.1 Block Diagram ........................................................................................................................ 260
12.2 Functional Description ............................................................................................................. 260
12.2.1 Transmit/Receive Logic ........................................................................................................... 260
12.2.2 Baud-Rate Generation ............................................................................................................. 261
12.2.3 Data Transmission .................................................................................................................. 262
12.2.4 Serial IR (SIR) ......................................................................................................................... 262
12.2.5 FIFO Operation ....................................................................................................................... 263
12.2.6 Interrupts ................................................................................................................................ 263
12.2.7 Loopback Operation ................................................................................................................ 264
12.2.8 IrDA SIR block ........................................................................................................................ 264
12.3 Initialization and Configuration ................................................................................................. 264
12.4 Register Map .......................................................................................................................... 265
12.5 Register Descriptions .............................................................................................................. 266
13 Synchronous Serial Interface (SSI) ................................................................................ 300
13.1 Block Diagram ........................................................................................................................ 300
13.2 Functional Description ............................................................................................................. 300
13.2.1 Bit Rate Generation ................................................................................................................. 301
13.2.2 FIFO Operation ....................................................................................................................... 301
13.2.3 Interrupts ................................................................................................................................ 301
13.2.4 Frame Formats ....................................................................................................................... 302
13.3 Initialization and Configuration ................................................................................................. 309
13.4 Register Map .......................................................................................................................... 310
13.5 Register Descriptions .............................................................................................................. 311
14 Inter-Integrated Circuit (I2C) Interface ............................................................................ 337
14.1 Block Diagram ........................................................................................................................ 337
November 30, 2007
Preliminary
5
5 Page 
LM3S1960 Microcontroller
Table 21-11.
Table 21-12.
Table 21-13.
Table 21-14.
Table 21-15.
Table 21-16.
Table C-1.
I2C Characteristics ......................................................................................................... 459
Hibernation Module Characteristics ................................................................................. 460
SSI Characteristics ........................................................................................................ 461
JTAG Characteristics ..................................................................................................... 462
GPIO Characteristics ..................................................................................................... 464
Reset Characteristics ..................................................................................................... 464
Part Ordering Information ............................................................................................... 491
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November 30, 2007
Preliminary
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet LM3S1960.PDF ] | |
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