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PDF ICS83021I Data sheet ( Hoja de datos )

Número de pieza ICS83021I
Descripción DIFFERENTIAL-TO-LVCMOS/LVTTL TRANSLATOR
Fabricantes Integrated Circuit Systems 
Logotipo Integrated Circuit Systems Logotipo



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Integrated
Circuit
Systems, Inc.
ICS83021I
1-TO-1
2.5V, 3.3V DIFFERENTIAL-TO-LVCMOS/LVTTL TRANSLATOR
GENERAL DESCRIPTION
The ICS83021I is a 1-to-1 Differential-to-
ICS LVCMOS/LVTTL Translator and a member of
HiPerClockS™ t h e H i Pe r C l o ckS™fa m i l y of H i g h Pe r fo r -
mance Clock Solutions from ICS. The differ-
ential input is highly flexible and can accept the
following input types: LVPECL, LVDS, LVHSTL, SSTL, and
HCSL. The small 8-lead SOIC footprint makes this device
ideal for use in applications with limited board space.
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FEATURES
One LVCMOS / LVTTL output
Differential CLK, nCLK input pair
CLK, nCLK pair can accept the following differential
input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL
Maximum output frequency: 350MHz (typical)
Part-to-part skew: 500ps (maximum)
Additive phase jitter, RMS: 0.21ps (typical), 3.3V output
Small 8 lead SOIC package saves board space
Full 3.3V, 2.5V operating supply
-40°C to 85°C ambient operating temperature
Available in both standard and lead-free RoHS-compliant
packages
BLOCK DIAGRAM
CLK
nCLK
Q0
PIN ASSIGNMENT
nc
CLK
nCLK
nc
1
2
3
4
8 VDD
7 Q0
6 nc
5 GND
ICS83021I
8-Lead SOIC
3.8mm x 4.8mm, x 1.47mm package body
M Package
Top View
83021AMI
www.icst.com/products/hiperclocks.html
1
REV. C DECEMBER 12, 2005

1 page




ICS83021I pdf
Integrated
Circuit
Systems, Inc.
ICS83021I
1-TO-1
2.5V, 3.3V DIFFERENTIAL-TO-LVCMOS/LVTTL TRANSLATOR
ADDITIVE PHASE JITTER
The spectral purity in a band at a specific offset from the
fundamental compared to the power of the fundamental is
called the dBc Phase Noise. This value is normally expressed
using a Phase noise plot and is most often the specified plot
in many applications. Phase noise is defined as the ratio of
the noise power present in a 1Hz band at a specified offset
www.DataSheeftr4oUm.cotmhe fundamental frequency to the power value of the
fundamental. This ratio is expressed in decibels (dBm) or a
ratio of the power in the 1Hz band to the power in the funda-
mental. When the required offset is specified, the phase noise
is called a dBc value, which simply means dBm at a specified
offset from the fundamental. By investigating jitter in the fre-
quency domain, we get a better understanding of its effects
on the desired application over the entire time record of the
signal. It is mathematically possible to calculate an expected
bit error rate given a phase noise plot.
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
-170
-180
-190
1k
Additive Phase Jitter @ 100MHz
(12kHz to 20MHz)
= 0.21ps typical
10k 100k 1M 10M
OFFSET FROM CARRIER FREQUENCY (HZ)
100M
As with most timing specifications, phase noise measure-
ments have issues. The primary issue relates to the limita-
tions of the equipment. Often the noise floor of the equipment
is higher than the noise floor of the device. This is illustrated
above. The device meets the noise floor of what is shown, but
can actually be lower. The phase noise is dependant on the
input source and measurement equipment.
83021AMI
www.icst.com/products/hiperclocks.html
5
REV. C DECEMBER 12, 2005

5 Page





ICS83021I arduino
Integrated
Circuit
Systems, Inc.
ICS83021I
1-TO-1
2.5V, 3.3V DIFFERENTIAL-TO-LVCMOS/LVTTL TRANSLATOR
TABLE 7. ORDERING INFORMATION
Part/Order Number
Marking
Package
Shipping Packaging Temperature
ICS83021AMI
83021AMI
8 lead SOIC
tube
-40°C to 85°C
ICS83021AMIT
83021AMI
8 lead SOIC
2500 tape & reel
-40°C to 85°C
ICS83021AMILF
83021AIL
8 lead "Lead-Free" SOIC
tube
-40°C to 85°C
ICS83021AMILFT
83021AIL
8 lead "Lead-Free" SOIC
2500 tape & reel
-40°C to 85°C
NOTE: Parts that are ordered with an "LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant.
www.DataSheet4U.com
The aforementioned trademark, HiPerClockS is a trademark of Integrated Circuit Systems, Inc. or its subsidiaries in the United States and/or other countries.
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use
or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use
in normal commercial and industrial applications. Any other applications such as those requiring high reliability or other extraordinary environmental requirements are not
recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product
for use in life support devices or critical medical instruments.
83021AMI
www.icst.com/products/hiperclocks.html
REV. C DECEMBER 12, 2005
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