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PDF MC33910 Data sheet ( Hoja de datos )

Número de pieza MC33910
Descripción LIN System Basis Chip
Fabricantes Freescale Semiconductor 
Logotipo Freescale Semiconductor Logotipo



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No Preview Available ! MC33910 Hoja de datos, Descripción, Manual

Freescale Semiconductor
Advance Information
Document Number: MC33910
Rev. 4.0, 2/2008
LIN System Basis Chip with
2x60mA High Side Drivers
33910
The 33910 is a Serial Peripheral Interface (SPI)-controlled System
Basis Chip (SBC), that combines many frequently used functions in
an MCU-based system, plus a Local Interconnect Network (LIN)
transceiver. It has a 5.0V, 60mA low dropout regulator with full
protection and reporting features. The device provides full SPI-
readable diagnostic and a selectable timing watchdog for detecting
errant operation. The LIN Protocol Specification, version 2.0
compliant LIN transceiver has waveshaping circuitry that can be
disabled for higher data rates.
Two 60mA high side switches with optional pulse-width modulation
www.DataShee(tP4UW.cMo)mare implemented to drive small loads. One high voltage input
is available for use in contact monitoring or as external wake-up input.
This input can be used as high voltage Analog Input as well. The
voltage on this pin is divided by a selectable ratio and available via an
analog multiplexer.
The 33910 has three main operating modes: Normal (all functions
available); Sleep (VDD off, wake-up via LIN, wake-up input (L1), cyclic
sense and forced wake-up) and Stop (VDD on with limited current
capability, wake-up via CS, LIN bus, wake-up input, cyclic sense,
forced wake-up and external reset).
The 33910 is compatible with LIN Protocol Specification 2.0.
SYSTEM BASIS CHIP WITH LIN
2ND GENERATION
AC SUFFIX (Pb-FREE)
98ASH70029A
32-PIN LQFP
Features
• Two 60mA high side switches
• One high voltage analog/logic input
• Full-duplex SPI at frequencies up to 4MHz
• LIN transceiver capable of up to 100kbps with wave shaping
• Configurable window watchdog
• 5.0V low drop regulator with fault detection and low voltage
reset (LVR) circuitry
• Switched/protected 5.0V output (used for Hall sensors)
• Pb-free packaging designated by suffix code AC
33910
ORDERING INFORMATION
Device
Temperature
Range (TA)
Package
MC33910BAC/R2
MC34910BAC/R2
-40°C to 125°C
-40°C to 85°C
32-LQFP
VBAT
VS1
VSENSE
VS2
HS1
L1
MCU
VDD
PWMIN
ADOUT0
MOSI
MISO
SCLK
CS
RXD
TXD
IRQ
RST
LIN
HVDD
HS2
WDCONF
LIN INTERFACE
Figure 1. 33910 Simplified Application Diagram
* This document contains certain information on a new product.
Specifications and information herein are subject to change without notice.
© Freescale Semiconductor, Inc., 2007. All rights reserved.

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MC33910 pdf
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
Table 2. Maximum Ratings
All voltages are with respect to ground, unless otherwise noted. Exceeding these ratings may cause a malfunction or
permanent damage to the device.
Ratings
Symbol
Value
Unit
ELECTRICAL RATINGS
Supply Voltage at VS1 and VS2
Normal Operation (DC)
www.DataSheet4U.Tcoramnsient Conditions (load dump)
Supply Voltage at VDD
Input / Output Pins Voltage(6)
CS, RST, SCLK, PWMIN, ADOUT0, MOSI, MISO, TXD, RXD
Interrupt Pin (IRQ)(7)
HS1 Pin Voltage (DC)
HS2 Pin Voltage (DC)
L1 Pin Voltage
Normal Operation with a series 33kresistor (DC)
Transient input voltage with external component (according to ISO7637-2)
(See Figure 5, page 16)
VSENSE Pin Voltage (DC)
LIN Pin Voltage
Normal Operation (DC)
Transient input voltage with external component (according to ISO7637-2)
(See Figure 4, page 16)
VSUP(SS)
VSUP(PK)
VDD
VIN
VIN(IRQ)
VHS1
VHS2
VL1DC
VL1TR
VVSENSE
VBUSDC
VBUSTR
-0.3 to 27
-0.3 to 40
-0.3 to 5.5
-0.3 to VDD+0.3
-0.3 to 11
-0.3 to VSUP+0.3
-0.3 to VSUP+0.3
-18 to 40
±100
-27 to 40
-18 to 40
-150 to 100
V
V
V
V
V
V
V
V
VDD output current
ESD Voltage(8)
Human Body Model - LIN Pin
Human Body Model - all other Pins
Machine Model
Charge Device Model
Corner Pins (Pins 1, 8, 9, 16, 17, 24, 25 and 32)
All other Pins (Pins 2-7, 10-15, 18-23, 26-31)
NC Pin Voltage (NC pins 11, 15, 16, 17, 19, 20, 21, 22, and 28)(9)
IVDD
VESD1-1
VESD1-2
VESD2
VESD3-1
VESD3-2
VNC
Internally Limited
± 8000
±2000
± 200
± 750
± 500
Note 9
A
V
Notes
6. Exceeding voltage limits on specified pins may cause a malfunction or permanent damage to the device.
7. Extended voltage range for programming purpose only.
8. Testing is performed in accordance with the Human Body Model (CZAP = 100 pF, RZAP = 1500 Ω), the Machine Model (CZAP = 200 pF,
RZAP = 0Ω), and the Charge Device Model, Robotic (CZAP = 4.0pF).
9. Special configuration recommended / mandatory for marked NC pins. Please refer to the typical application shown on page 40.
Analog Integrated Circuit Device Data
Freescale Semiconductor
33910
5

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MC33910 arduino
ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
Table 3. Static Electrical Characteristics (continued)
Characteristics noted under conditions 5.5V VSUP 18V, -40°C TA 125°C for the 33910 and -40°C TA 85°C for the
34910, unless otherwise noted. Typical values noted reflect the approximate parameter mean at TA = 25°C under nominal
conditions, unless otherwise noted.
Characteristic
WINDOW WATCHDOG CONFIGURATION PIN (WDCONF)
Symbol Min Typ Max Unit
External Resistor Range
REXT 20 – 200 k
Watchdog Period Accuracy with External Resistor (Excluding Resistor
Accuracy)(35)
WDACC
-15
15 %
ANALOG MULTIPLEXER
Internal Chip Temperature Sense Gain
www.DataSheet4VUS.EcoNmSE Input Divider Ratio (RATIOVSENSE = VVSENSE / VADOUT0)
5.5V < VSUP < 27V
STTOV
RATIOVSENSE
5.0
10.5
5.25
– mV/K
5.5
VSENSE Output Related Offset
-40°C < TA < -20°C
OFFSETVSENS
-30
30 mV
E -45 – 45
ANALOG OUTPUT (ADOUT0)
Maximum Output Voltage
-5mA < IO < 5mA
Minimum Output Voltage
-5mA < IO < 5mA
VOUT_MAX
VOUT_MIN
VDD - 0.35
0.0
VDD
0.35
V
V
RXD OUTPUT PIN (LIN PHYSICAL LAYER) (RXD)
Low-state Output Voltage
IOUT = 1.5 mA
VOL V
0.0 – 0.8
High-state Output Voltage
IOUT = -250µA
VOH
VDD-0.8
VDD
V
TXD INPUT PIN (LIN PHYSICAL LAYER) (TXD)
Low-state Input Voltage
VIL -0.3
High-state Input Voltage
VIH 0.7 x VDD
Pin Pull-up Current, 0 < VIN < 3.5V
IPUIN
10
Notes
35. Watchdog timing period calculation formula: tPWD [ms] = 0.466 * (REXT - 20) + 10 (REXT in kΩ)
– 0.3 x nVDD V
– VDD + 0.3 V
20 30 µA
Analog Integrated Circuit Device Data
Freescale Semiconductor
33910
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