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PDF PI74ALVCH16952 Data sheet ( Hoja de datos )
| Número de pieza | PI74ALVCH16952 | |
| Descripción | 16-Bit Registered Transceiver | |
| Fabricantes | Pericom Semiconductor Corporation | |
| Logotipo |  |
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PI74ALVCH16952
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16-Bit Registered Transceiver
With 3-STATE Outputs
Product Features
• PI74ALVCH16952 is designed for low voltage operation
• VCC = 2.3V to 3.6V
• Hysteresis on all inputs
• Typical VOLP (Output Ground Bounce)
< 0.8V at VCC = 3.3V, TA = 25°C
www.DataS•heTeyt4pUic.caolmVOHV (Output VOH Undershoot)
< 2.0V at VCC = 3.3V, TA = 25°C
• Bus Hold retains last active bus state during 3-STATE
eliminating the need for external pullup resistors
• Industrial operation at 40°C to +85°C
• Packages available:
48-pin 240 mil wide plastic TSSOP (A)
48-pin 300 mil wide plastic SSOP (V)
Logic Block Diagram
Product Description
Pericom Semiconductors PI74ALVCH series of logic circuits are
produced using the Companys advanced 0.5 micron CMOS
technology, achieving industry leading speed.
The PI74ALVCH16952 16-bit registered transceiver is designed for
2.3V to 3.6V VCC operation.
The product contains two sets of D-type flip-flops for temporary
storage of data flowing in either direction. The device can be used
as two 8-bit transceivers or one 16-bit tranceiver. Data on the A or
B bus is stored in the registers on the low-to-high transition of the
clock (CLKAB or CLKBA) input provided that the clock-enable
(CLKENAB or CLKENBA) input is low. Taking the output-enable
(OEAB or OEBA) input low accesses the data on either port.
To ensure the high-impedance state during power up or power down,
OE should be tied to Vcc through a pull-up resistor; the minimum
value of the resistor is determined by the current-sinking capability
of the driver.
The PI74ALVCH16952 has Bus Hold which retains the data
inputs last state whenever the data input goes to high-impedance
preventing floating inputs and eliminating the need for pullup/
down resistors.
1CLKENAB
1CLKAB
1OEBA
3
2
56
54
1CLKENBA
55
1CLKBA
1 1OEAB
5
1A1
One of Eight
Channels
C1
CE
1D
C1
CE
1D
52
1B1
2CLKENAB
2CLKAB
2OEBA
26
27
29
15
2A1
One of Eight
Channels
To Seven Other Channels
C1
CE
1D
C1
CE
1D
31
2CLKENBA
30
2CLKBA
28 2OEAB
42
2B1
To Seven Other Channels
1
PS8197A 10/16/00
1 page  
PI74ALVCH16952
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Timing Requirements over Operating Range
Parameters
Description
VCC = 2.5V ± 0.2V
Min.
Max.
fCLOCK
Clock frequency
0 150
tW Pulse
Duration
CLKEN high
CLK high or low
3.3
3.3
tSU Setup time
www.DataSheet4U.com
tH Hold time
∆t/∆v(1)
Data before CLK
CLKEN before CLK
Data after CLΚ
CLKEN after CLK
Input Transition Rise or Fall
1.7
1.2
0.6
1.1
0 10
Notes:
1. See test circuit and waveforms.
VCC = 2.7V
Min. Max.
0 150
3.3
3.3
1.9
1.0
0.6
0.9
0 10
Switching Characteristics Over Operating Range(1)
Parameters
From
(Input)
To
(Output)
VCC = 2.5V ± 0.2V
Min.(2)
Max.
fMAX
tPD
tEN
CLK
OEBA or
OEAB
A or B
150
4.1
1.0 5.4
tDIS
OEBA or
OEAB
5.3
Notes:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
VCC = 2.7V
Min.(2) Max.
150
4.6
5.3
4.4
VCC = 3.3V ± 0.3V
Units
Min.
Max.
0 150 MHz
3.3
3.3
1.5
ns
1.0
0.8
1.1
0 10 ns/V
VCC = 3.3V ± 0.V
Min.(2) Max.
150
1.0 3.9
Units
MHz
1.0 4.4 ns
1.1 4.0
Operating Characteristics, TA = 25ºC
Parameter
CPD Power Dissipation
Capacitance
Outputs Enabled
Outputs Disabled
Test Conditions
CL = 50pF
f = 10 MHz
VCC = 2.5V ± 0.2V VCC = 3.3V ± 0.3V
Typical
53 71
34 40
Units
pF
Pericom Semiconductor Corporation
2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com
5 PS8197A 10/16/00
5 Page | ||
| Páginas | Total 5 Páginas | |
| PDF Descargar | [ Datasheet PI74ALVCH16952.PDF ] | |
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